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-rw-r--r--src/arch/power/insts/branch.hh15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/arch/power/insts/branch.hh b/src/arch/power/insts/branch.hh
index 1947e4ec3..762e55a66 100644
--- a/src/arch/power/insts/branch.hh
+++ b/src/arch/power/insts/branch.hh
@@ -88,6 +88,9 @@ class BranchPCRel : public PCDependentDisassembly
PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const;
+ /// Explicitly import the otherwise hidden branchTarget
+ using StaticInst::branchTarget;
+
std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};
@@ -114,6 +117,9 @@ class BranchNonPCRel : public PCDependentDisassembly
PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const;
+ /// Explicitly import the otherwise hidden branchTarget
+ using StaticInst::branchTarget;
+
std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};
@@ -189,6 +195,9 @@ class BranchPCRelCond : public BranchCond
PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const;
+ /// Explicitly import the otherwise hidden branchTarget
+ using StaticInst::branchTarget;
+
std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};
@@ -215,6 +224,9 @@ class BranchNonPCRelCond : public BranchCond
PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const;
+ /// Explicitly import the otherwise hidden branchTarget
+ using StaticInst::branchTarget;
+
std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};
@@ -233,6 +245,9 @@ class BranchRegCond : public BranchCond
PowerISA::PCState branchTarget(ThreadContext *tc) const;
+ /// Explicitly import the otherwise hidden branchTarget
+ using StaticInst::branchTarget;
+
std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};