diff options
Diffstat (limited to 'src/arch/power/isa')
| -rw-r--r-- | src/arch/power/isa/formats/mem.isa | 14 | ||||
| -rw-r--r-- | src/arch/power/isa/includes.isa | 1 |
2 files changed, 8 insertions, 7 deletions
diff --git a/src/arch/power/isa/formats/mem.isa b/src/arch/power/isa/formats/mem.isa index 014e4ff5a..519275a16 100644 --- a/src/arch/power/isa/formats/mem.isa +++ b/src/arch/power/isa/formats/mem.isa @@ -84,7 +84,7 @@ def template LoadExecute {{ %(ea_code)s; if (fault == NoFault) { - fault = xc->read(EA, (uint%(mem_acc_size)d_t&)Mem, memAccessFlags); + fault = readMemAtomic(xc, traceData, EA, Mem, memAccessFlags); %(memacc_code)s; } @@ -109,7 +109,7 @@ def template LoadInitiateAcc {{ %(ea_code)s; if (fault == NoFault) { - fault = xc->read(EA, (uint%(mem_acc_size)d_t &)Mem, memAccessFlags); + fault = readMemTiming(xc, traceData, EA, Mem, memAccessFlags); xc->setEA(EA); } @@ -132,7 +132,7 @@ def template LoadCompleteAcc {{ EA = xc->getEA(); - val = pkt->get<uint%(mem_acc_size)d_t>(); + getMem(pkt, val, traceData); *((uint%(mem_acc_size)d_t*)&Mem) = val; if (fault == NoFault) { @@ -164,8 +164,8 @@ def template StoreExecute {{ } if (fault == NoFault) { - fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, - memAccessFlags, NULL); + fault = writeMemAtomic(xc, traceData, Mem, EA, memAccessFlags, + NULL); } if (fault == NoFault) { @@ -193,8 +193,8 @@ def template StoreInitiateAcc {{ } if (fault == NoFault) { - fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, - memAccessFlags, NULL); + fault = writeMemTiming(xc, traceData, Mem, EA, memAccessFlags, + NULL); } // Need to write back any potential address register update diff --git a/src/arch/power/isa/includes.isa b/src/arch/power/isa/includes.isa index 5c2b74141..f6292eaab 100644 --- a/src/arch/power/isa/includes.isa +++ b/src/arch/power/isa/includes.isa @@ -75,6 +75,7 @@ output exec {{ #include <fenv.h> #endif +#include "arch/generic/memhelpers.hh" #include "arch/power/faults.hh" #include "arch/power/isa_traits.hh" #include "arch/power/utility.hh" |