diff options
Diffstat (limited to 'src/arch/power/isa')
-rw-r--r-- | src/arch/power/isa/decoder.isa | 2 | ||||
-rw-r--r-- | src/arch/power/isa/operands.isa | 3 |
2 files changed, 1 insertions, 4 deletions
diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa index 060d6a34d..3f10fe48b 100644 --- a/src/arch/power/isa/decoder.isa +++ b/src/arch/power/isa/decoder.isa @@ -517,7 +517,7 @@ decode OPCODE default Unknown::unknown() { 55: stfdu({{ Mem_df = Fs; }}); } - 17: IntOp::sc({{ xc->syscall(R0, &fault); }}, + 17: IntOp::sc({{ xc->syscall(&fault); }}, [ IsSyscall, IsNonSpeculative, IsSerializeAfter ]); format FloatArithOp { diff --git a/src/arch/power/isa/operands.isa b/src/arch/power/isa/operands.isa index a72a0714d..117c8ad02 100644 --- a/src/arch/power/isa/operands.isa +++ b/src/arch/power/isa/operands.isa @@ -75,7 +75,4 @@ def operands {{ 'Rsv': ('IntReg', 'uw', 'INTREG_RSV', 'IsInteger', 9), 'RsvLen': ('IntReg', 'uw', 'INTREG_RSV_LEN', 'IsInteger', 9), 'RsvAddr': ('IntReg', 'uw', 'INTREG_RSV_ADDR', 'IsInteger', 9), - - # Hack for non-full-system syscall emulation - 'R0': ('IntReg', 'uw', '0', None, 1), }}; |