diff options
Diffstat (limited to 'src/arch/power')
-rw-r--r-- | src/arch/power/tlb.cc | 7 | ||||
-rw-r--r-- | src/arch/power/tlb.hh | 15 |
2 files changed, 7 insertions, 15 deletions
diff --git a/src/arch/power/tlb.cc b/src/arch/power/tlb.cc index 417277830..ff2f94fb6 100644 --- a/src/arch/power/tlb.cc +++ b/src/arch/power/tlb.cc @@ -330,13 +330,6 @@ TLB::translateTiming(RequestPtr req, ThreadContext *tc, } Fault -TLB::translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode) -{ - panic("Not implemented\n"); - return NoFault; -} - -Fault TLB::finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const { return NoFault; diff --git a/src/arch/power/tlb.hh b/src/arch/power/tlb.hh index de03da034..ca82d0b45 100644 --- a/src/arch/power/tlb.hh +++ b/src/arch/power/tlb.hh @@ -162,14 +162,13 @@ class TLB : public BaseTLB static Fault checkCacheability(RequestPtr &req); Fault translateInst(RequestPtr req, ThreadContext *tc); Fault translateData(RequestPtr req, ThreadContext *tc, bool write); - Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode); - void translateTiming(RequestPtr req, ThreadContext *tc, - Translation *translation, Mode mode); - /** Stub function for CheckerCPU compilation support. Power ISA not - * supported by Checker at the moment - */ - Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode); - Fault finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const; + Fault translateAtomic( + RequestPtr req, ThreadContext *tc, Mode mode) override; + void translateTiming( + RequestPtr req, ThreadContext *tc, + Translation *translation, Mode mode) override; + Fault finalizePhysical( + RequestPtr req, ThreadContext *tc, Mode mode) const override; // Checkpointing void serialize(CheckpointOut &cp) const override; |