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-rw-r--r--src/arch/power/tlb.hh4
-rw-r--r--src/arch/power/types.hh5
2 files changed, 4 insertions, 5 deletions
diff --git a/src/arch/power/tlb.hh b/src/arch/power/tlb.hh
index a07dad954..81ea22cc4 100644
--- a/src/arch/power/tlb.hh
+++ b/src/arch/power/tlb.hh
@@ -172,8 +172,8 @@ class TLB : public BaseTLB
Fault finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const;
// Checkpointing
- void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
- void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+ void serialize(CheckpointOut &cp) const override;
+ void unserialize(CheckpointIn &cp) override;
void regStats();
};
diff --git a/src/arch/power/types.hh b/src/arch/power/types.hh
index a5d204827..83917ec0c 100644
--- a/src/arch/power/types.hh
+++ b/src/arch/power/types.hh
@@ -33,7 +33,6 @@
#include "arch/generic/types.hh"
#include "base/bitunion.hh"
-#include "base/hashmap.hh"
#include "base/types.hh"
namespace PowerISA
@@ -89,7 +88,7 @@ typedef GenericISA::SimplePCState<MachInst> PCState;
} // PowerISA namespace
-__hash_namespace_begin
+namespace std {
template<>
struct hash<PowerISA::ExtMachInst> : public hash<uint32_t> {
@@ -98,6 +97,6 @@ struct hash<PowerISA::ExtMachInst> : public hash<uint32_t> {
};
};
-__hash_namespace_end
+}
#endif // __ARCH_POWER_TYPES_HH__