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-rw-r--r--src/arch/power/insts/branch.hh25
-rw-r--r--src/arch/power/insts/condition.hh6
-rw-r--r--src/arch/power/insts/floating.hh3
-rw-r--r--src/arch/power/insts/integer.hh12
-rw-r--r--src/arch/power/insts/mem.hh6
-rw-r--r--src/arch/power/insts/misc.hh3
-rw-r--r--src/arch/power/insts/static_inst.hh6
-rw-r--r--src/arch/power/isa/formats/basic.isa3
-rw-r--r--src/arch/power/isa/formats/mem.isa7
-rw-r--r--src/arch/power/isa/formats/unimp.isa12
-rw-r--r--src/arch/power/isa/formats/unknown.isa6
11 files changed, 53 insertions, 36 deletions
diff --git a/src/arch/power/insts/branch.hh b/src/arch/power/insts/branch.hh
index 762e55a66..b368fed88 100644
--- a/src/arch/power/insts/branch.hh
+++ b/src/arch/power/insts/branch.hh
@@ -86,12 +86,13 @@ class BranchPCRel : public PCDependentDisassembly
}
}
- PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const;
+ PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const override;
/// Explicitly import the otherwise hidden branchTarget
using StaticInst::branchTarget;
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
/**
@@ -115,12 +116,13 @@ class BranchNonPCRel : public PCDependentDisassembly
}
}
- PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const;
+ PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const override;
/// Explicitly import the otherwise hidden branchTarget
using StaticInst::branchTarget;
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
/**
@@ -193,12 +195,13 @@ class BranchPCRelCond : public BranchCond
}
}
- PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const;
+ PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const override;
/// Explicitly import the otherwise hidden branchTarget
using StaticInst::branchTarget;
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
/**
@@ -222,12 +225,13 @@ class BranchNonPCRelCond : public BranchCond
}
}
- PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const;
+ PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const override;
/// Explicitly import the otherwise hidden branchTarget
using StaticInst::branchTarget;
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
/**
@@ -243,12 +247,13 @@ class BranchRegCond : public BranchCond
{
}
- PowerISA::PCState branchTarget(ThreadContext *tc) const;
+ PowerISA::PCState branchTarget(ThreadContext *tc) const override;
/// Explicitly import the otherwise hidden branchTarget
using StaticInst::branchTarget;
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
} // namespace PowerISA
diff --git a/src/arch/power/insts/condition.hh b/src/arch/power/insts/condition.hh
index e5112b2c1..f9753f72a 100644
--- a/src/arch/power/insts/condition.hh
+++ b/src/arch/power/insts/condition.hh
@@ -57,7 +57,8 @@ class CondLogicOp : public PowerStaticInst
{
}
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
/**
@@ -78,7 +79,8 @@ class CondMoveOp : public PowerStaticInst
{
}
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
} // namespace PowerISA
diff --git a/src/arch/power/insts/floating.hh b/src/arch/power/insts/floating.hh
index 65906e507..551573f3a 100644
--- a/src/arch/power/insts/floating.hh
+++ b/src/arch/power/insts/floating.hh
@@ -145,7 +145,8 @@ class FloatOp : public PowerStaticInst
return c;
}
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
} // namespace PowerISA
diff --git a/src/arch/power/insts/integer.hh b/src/arch/power/insts/integer.hh
index f911eb08a..1aadd2490 100644
--- a/src/arch/power/insts/integer.hh
+++ b/src/arch/power/insts/integer.hh
@@ -91,7 +91,8 @@ class IntOp : public PowerStaticInst
return c;
}
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
@@ -113,7 +114,8 @@ class IntImmOp : public IntOp
{
}
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
@@ -133,7 +135,8 @@ class IntShiftOp : public IntOp
{
}
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
@@ -168,7 +171,8 @@ class IntRotateOp : public IntShiftOp
return (rs << n) | (rs >> (32 - n));
}
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
} // namespace PowerISA
diff --git a/src/arch/power/insts/mem.hh b/src/arch/power/insts/mem.hh
index 0a8dc4946..6c41b1636 100644
--- a/src/arch/power/insts/mem.hh
+++ b/src/arch/power/insts/mem.hh
@@ -53,7 +53,8 @@ class MemOp : public PowerStaticInst
{
}
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
@@ -72,7 +73,8 @@ class MemDispOp : public MemOp
{
}
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
} // namespace PowerISA
diff --git a/src/arch/power/insts/misc.hh b/src/arch/power/insts/misc.hh
index d6a73d254..4d9e23ab0 100644
--- a/src/arch/power/insts/misc.hh
+++ b/src/arch/power/insts/misc.hh
@@ -49,7 +49,8 @@ class MiscOp : public PowerStaticInst
{
}
- std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
} // namespace PowerISA
diff --git a/src/arch/power/insts/static_inst.hh b/src/arch/power/insts/static_inst.hh
index f4f1bec7b..d154aafb8 100644
--- a/src/arch/power/insts/static_inst.hh
+++ b/src/arch/power/insts/static_inst.hh
@@ -61,11 +61,11 @@ class PowerStaticInst : public StaticInst
void
printReg(std::ostream &os, RegId reg) const;
- std::string
- generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
void
- advancePC(PowerISA::PCState &pcState) const
+ advancePC(PowerISA::PCState &pcState) const override
{
pcState.advance();
}
diff --git a/src/arch/power/isa/formats/basic.isa b/src/arch/power/isa/formats/basic.isa
index 8adce1c7b..e65fe2df4 100644
--- a/src/arch/power/isa/formats/basic.isa
+++ b/src/arch/power/isa/formats/basic.isa
@@ -38,7 +38,8 @@ def template BasicDeclare {{
public:
/// Constructor.
%(class_name)s(ExtMachInst machInst);
- Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault execute(ExecContext *,
+ Trace::InstRecord *) const override;
};
}};
diff --git a/src/arch/power/isa/formats/mem.isa b/src/arch/power/isa/formats/mem.isa
index 719cb39a4..47ffc916b 100644
--- a/src/arch/power/isa/formats/mem.isa
+++ b/src/arch/power/isa/formats/mem.isa
@@ -44,9 +44,10 @@ def template LoadStoreDeclare {{
/// Constructor.
%(class_name)s(ExtMachInst machInst);
- Fault execute(ExecContext *, Trace::InstRecord *) const;
- Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
- Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
+ Fault execute(ExecContext *, Trace::InstRecord *) const override;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const override;
+ Fault completeAcc(PacketPtr, ExecContext *,
+ Trace::InstRecord *) const override;
};
}};
diff --git a/src/arch/power/isa/formats/unimp.isa b/src/arch/power/isa/formats/unimp.isa
index f9af7f0fc..4c49ffac7 100644
--- a/src/arch/power/isa/formats/unimp.isa
+++ b/src/arch/power/isa/formats/unimp.isa
@@ -55,10 +55,10 @@ output header {{
flags[IsNonSpeculative] = true;
}
- Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault execute(ExecContext *, Trace::InstRecord *) const override;
- std::string
- generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
/**
@@ -86,10 +86,10 @@ output header {{
flags[IsNonSpeculative] = true;
}
- Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault execute(ExecContext *, Trace::InstRecord *) const override;
- std::string
- generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
}};
diff --git a/src/arch/power/isa/formats/unknown.isa b/src/arch/power/isa/formats/unknown.isa
index f8cd3bf43..ee4bc2a52 100644
--- a/src/arch/power/isa/formats/unknown.isa
+++ b/src/arch/power/isa/formats/unknown.isa
@@ -53,10 +53,10 @@ output header {{
flags[IsNonSpeculative] = true;
}
- Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault execute(ExecContext *, Trace::InstRecord *) const override;
- std::string
- generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+ std::string generateDisassembly(
+ Addr pc, const SymbolTable *symtab) const override;
};
}};
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-10 21:38:35 +0000