diff options
Diffstat (limited to 'src/arch/riscv/faults.cc')
| -rw-r--r-- | src/arch/riscv/faults.cc | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/arch/riscv/faults.cc b/src/arch/riscv/faults.cc index 4e44d43f0..ce4cb3846 100644 --- a/src/arch/riscv/faults.cc +++ b/src/arch/riscv/faults.cc @@ -1,6 +1,7 @@ /* * Copyright (c) 2016 RISC-V Foundation * Copyright (c) 2016 The University of Virginia + * Copyright (c) 2018 TU Dresden * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -27,10 +28,13 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Authors: Alec Roelke + * Robert Scheffel */ #include "arch/riscv/faults.hh" +#include "arch/riscv/system.hh" #include "arch/riscv/utility.hh" +#include "cpu/base.hh" #include "cpu/thread_context.hh" #include "sim/debug.hh" #include "sim/full_system.hh" @@ -56,6 +60,18 @@ RiscvFault::invoke(ThreadContext *tc, const StaticInstPtr &inst) } } +void Reset::invoke(ThreadContext *tc, const StaticInstPtr &inst) +{ + if (FullSystem) { + tc->getCpuPtr()->clearInterrupts(tc->threadId()); + tc->clearArchRegs(); + } + + // Advance the PC to the implementation-defined reset vector + PCState pc = static_cast<RiscvSystem *>(tc->getSystemPtr())->resetVect(); + tc->pcState(pc); +} + void UnknownInstFault::invoke_se(ThreadContext *tc, const StaticInstPtr &inst) { |