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-rw-r--r--src/arch/riscv/faults.hh23
1 files changed, 23 insertions, 0 deletions
diff --git a/src/arch/riscv/faults.hh b/src/arch/riscv/faults.hh
index 1e33b648f..478bfd27e 100644
--- a/src/arch/riscv/faults.hh
+++ b/src/arch/riscv/faults.hh
@@ -1,6 +1,7 @@
/*
* Copyright (c) 2016 RISC-V Foundation
* Copyright (c) 2016 The University of Virginia
+ * Copyright (c) 2018 TU Dresden
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -27,6 +28,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Alec Roelke
+ * Robert Scheffel
*/
#ifndef __ARCH_RISCV_FAULTS_HH__
@@ -104,6 +106,27 @@ class RiscvFault : public FaultBase
invoke(ThreadContext *tc, const StaticInstPtr &inst);
};
+class Reset : public FaultBase
+{
+
+ public:
+ Reset()
+ : _name("reset")
+ {}
+
+ FaultName
+ name() const override
+ {
+ return _name;
+ }
+
+ void
+ invoke(ThreadContext *tc, const StaticInstPtr &inst =
+ StaticInst::nullStaticInstPtr) override;
+
+ private:
+ const FaultName _name;
+};
class UnknownInstFault : public RiscvFault
{