1 files changed, 0 insertions, 18 deletions
diff --git a/src/arch/riscv/isa/base.isa b/src/arch/riscv/isa/base.isa
index a7e2fc954..d54d7940b 100644
--- a/src/arch/riscv/isa/base.isa
+++ b/src/arch/riscv/isa/base.isa
@@ -50,9 +50,6 @@ output header {{
             OpClass __opClass) : StaticInst(mnem, _machInst, __opClass)
         {}
 
-        std::string
-        regName(RegId reg) const;
-
         virtual std::string
         generateDisassembly(Addr pc, const SymbolTable *symtab) const = 0;
 
@@ -64,18 +61,3 @@ output header {{
         }
     };
 }};
-
-//Ouputs to decoder.cc
-output decoder {{
-    std::string
-    RiscvStaticInst::regName(RegId reg) const
-    {
-        if (reg.isIntReg()) {
-            return std::string(RegisterNames[reg.index()]);
-        } else if (reg.isFloatReg()) {
-            return std::string("f") + std::to_string(reg.index());
-        } else {
-            return csprintf("%s{%i}", reg.className(), reg.index());
-        }
-    }
-}};