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diff --git a/src/arch/riscv/isa/bitfields.isa b/src/arch/riscv/isa/bitfields.isa
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+// -*- mode:c++ -*-
+
+// Copyright (c) 2015 RISC-V Foundation
+// Copyright (c) 2016 The University of Virginia
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met: redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer;
+// redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution;
+// neither the name of the copyright holders nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+// Authors: Maxwell Walter
+//          Alec Roelke
+
+////////////////////////////////////////////////////////////////////
+//
+// Bitfield definitions.
+//
+
+def bitfield OPCODE <6:0>;
+def bitfield NONOPCODE <31:7>;
+
+// R-Type
+def bitfield ALL	<31:0>;
+def bitfield RD     <11:7>;
+def bitfield FUNCT3 <14:12>;
+def bitfield RS1    <19:15>;
+def bitfield RS2    <24:20>;
+def bitfield FUNCT7 <31:25>;
+
+// Bit shifts
+def bitfield SRTYPE <30>;
+def bitfield SHAMT5 <24:20>;
+def bitfield SHAMT6 <25:20>;
+
+// I-Type
+def bitfield IMM12  <31:20>;
+
+// S-Type
+def bitfield IMM5   <11:7>;
+def bitfield IMM7   <31:25>;
+
+// U-Type
+def bitfield IMM20  <31:12>;
+
+// SB-Type
+def bitfield BIMM12BIT11 <7>;
+def bitfield BIMM12BITS4TO1<11:8>;
+def bitfield IMMSIGN <31>;
+def bitfield BIMM12BITS10TO5 <30:25>;
+
+// UJ-Type
+def bitfield UJIMMBITS10TO1 <30:21>;
+def bitfield  UJIMMBIT11 <20>;
+def bitfield UJIMMBITS19TO12 <19:12>;
+
+// System
+def bitfield FUNCT12 <31:20>;
+def bitfield ZIMM <19:15>;