diff options
Diffstat (limited to 'src/arch/riscv/isa/formats/compressed.isa')
| -rw-r--r-- | src/arch/riscv/isa/formats/compressed.isa | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/src/arch/riscv/isa/formats/compressed.isa b/src/arch/riscv/isa/formats/compressed.isa index 3ebc1c6ae..b520d53eb 100644 --- a/src/arch/riscv/isa/formats/compressed.isa +++ b/src/arch/riscv/isa/formats/compressed.isa @@ -47,6 +47,28 @@ def format CIOp(imm_code, code, imm_type='int64_t', *opt_flags) {{ exec_output = ImmExecute.subst(iop) }}; +def format CJOp(code, *opt_flags) {{ + regs = ['_destRegIdx[0]', '_srcRegIdx[0]'] + imm_code = """ + imm = CJUMPIMM3TO1 << 1 | + CJUMPIMM4TO4 << 4 | + CJUMPIMM5TO5 << 5 | + CJUMPIMM6TO6 << 6 | + CJUMPIMM7TO7 << 7 | + CJUMPIMM9TO8 << 8 | + CJUMPIMM10TO10 << 10; + if (CJUMPIMMSIGN) + imm |= ~((int64_t)0x7FF); + """ + iop = InstObjParams(name, Name, 'ImmOp<int64_t>', + {'code': code, 'imm_code': imm_code, + 'regs': ','.join(regs)}, opt_flags) + header_output = BranchDeclare.subst(iop) + decoder_output = ImmConstructor.subst(iop) + decode_block = BasicDecode.subst(iop) + exec_output = BranchExecute.subst(iop) +}}; + def format CBOp(code, *opt_flags) {{ imm_code = """ imm = CIMM5<2:1> << 1 | @@ -78,4 +100,4 @@ def format CompressedStore(sdisp_code, memacc_code, (header_output, decoder_output, decode_block, exec_output) = \ LoadStoreBase(name, Name, sdisp_code, ea_code, memacc_code, mem_flags, inst_flags, 'Store', exec_template_base='Store') -}};
\ No newline at end of file +}}; |