diff options
Diffstat (limited to 'src/arch/riscv/isa')
-rw-r--r-- | src/arch/riscv/isa/base.isa | 15 | ||||
-rw-r--r-- | src/arch/riscv/isa/formats/type.isa | 2 |
2 files changed, 10 insertions, 7 deletions
diff --git a/src/arch/riscv/isa/base.isa b/src/arch/riscv/isa/base.isa index 18233e37a..dafccc981 100644 --- a/src/arch/riscv/isa/base.isa +++ b/src/arch/riscv/isa/base.isa @@ -51,7 +51,7 @@ output header {{ {} std::string - regName(RegIndex reg) const; + regName(RegId reg) const; virtual std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const = 0; @@ -68,12 +68,15 @@ output header {{ //Ouputs to decoder.cc output decoder {{ std::string - RiscvStaticInst::regName(RegIndex reg) const + RiscvStaticInst::regName(RegId reg) const { - if (reg < FP_Reg_Base) { - return std::string(RegisterNames[reg]); - } else { - return std::string("f") + std::to_string(reg - FP_Reg_Base); + switch (reg.regClass) { + case IntRegClass: + return std::string(RegisterNames[reg.regIdx]); + case FloatRegClass: + return std::string("f") + std::to_string(reg.regIdx); + default: + return csprintf("unknown[%i/%i]", reg.regClass, reg.regIdx); } } }}; diff --git a/src/arch/riscv/isa/formats/type.isa b/src/arch/riscv/isa/formats/type.isa index 75e842fd2..0f2ffe9c4 100644 --- a/src/arch/riscv/isa/formats/type.isa +++ b/src/arch/riscv/isa/formats/type.isa @@ -210,7 +210,7 @@ output decoder {{ Jump::branchTarget(ThreadContext *tc) const { PCState pc = tc->pcState(); - IntReg Rs1 = tc->readIntReg(_srcRegIdx[0]); + IntReg Rs1 = tc->readIntReg(_srcRegIdx[0].regIdx); pc.set((Rs1 + imm)&~0x1); return pc; } |