diff options
Diffstat (limited to 'src/arch/riscv/registers.hh')
-rw-r--r-- | src/arch/riscv/registers.hh | 79 |
1 files changed, 47 insertions, 32 deletions
diff --git a/src/arch/riscv/registers.hh b/src/arch/riscv/registers.hh index 0793398fb..aeebd3fba 100644 --- a/src/arch/riscv/registers.hh +++ b/src/arch/riscv/registers.hh @@ -106,60 +106,64 @@ const int SyscallArgumentRegs[] = {ArgumentRegs[0], ArgumentRegs[1], ArgumentRegs[2], ArgumentRegs[3]}; const int SyscallPseudoReturnReg = ReturnValueRegs[0]; +const int NumHpmcounter = 29; +const int NumHpmcounterh = 29; +const int NumMhpmcounter = 29; +const int NumMhpmevent = 29; enum MiscRegIndex { + MISCREG_USTATUS = 0x000, + MISCREG_UIE = 0x004, + MISCREG_UTVEC = 0x005, + MISCREG_USCRATCH = 0x040, + MISCREG_UEPC = 0x041, + MISCREG_UCAUSE = 0x042, + MISCREG_UBADADDR = 0x043, + MISCREG_UIP = 0x044, MISCREG_FFLAGS = 0x001, MISCREG_FRM = 0x002, MISCREG_FCSR = 0x003, MISCREG_CYCLE = 0xC00, MISCREG_TIME = 0xC01, MISCREG_INSTRET = 0xC02, + MISCREG_HPMCOUNTER_BASE = 0xC03, MISCREG_CYCLEH = 0xC80, MISCREG_TIMEH = 0xC81, MISCREG_INSTRETH = 0xC82, + MISCREG_HPMCOUNTERH_BASE = 0xC83, MISCREG_SSTATUS = 0x100, - MISCREG_STVEC = 0x101, + MISCREG_SEDELEG = 0x102, + MISCREG_SIDELEG = 0x103, MISCREG_SIE = 0x104, - MISCREG_STIMECMP = 0x121, - MISCREG_STIME = 0xD01, - MISCREG_STIMEH = 0xD81, + MISCREG_STVEC = 0x105, MISCREG_SSCRATCH = 0x140, MISCREG_SEPC = 0x141, - MISCREG_SCAUSE = 0xD42, - MISCREG_SBADADDR = 0xD43, + MISCREG_SCAUSE = 0x142, + MISCREG_SBADADDR = 0x143, MISCREG_SIP = 0x144, MISCREG_SPTBR = 0x180, - MISCREG_SASID = 0x181, - MISCREG_CYCLEW = 0x900, - MISCREG_TIMEW = 0x901, - MISCREG_INSTRETW = 0x902, - MISCREG_CYCLEHW = 0x980, - MISCREG_TIMEHW = 0x981, - MISCREG_INSTRETHW = 0x982, MISCREG_HSTATUS = 0x200, - MISCREG_HTVEC = 0x201, - MISCREG_HTDELEG = 0x202, - MISCREG_HTIMECMP = 0x221, - MISCREG_HTIME = 0xE01, - MISCREG_HTIMEH = 0xE81, + MISCREG_HEDELEG = 0x202, + MISCREG_HIDELEG = 0x203, + MISCREG_HIE = 0x204, + MISCREG_HTVEC = 0x205, MISCREG_HSCRATCH = 0x240, MISCREG_HEPC = 0x241, MISCREG_HCAUSE = 0x242, MISCREG_HBADADDR = 0x243, - MISCREG_STIMEW = 0xA01, - MISCREG_STIMEHW = 0xA81, + MISCREG_HIP = 0x244, - MISCREG_MCPUID = 0xF00, - MISCREG_MIMPID = 0xF01, - MISCREG_MHARTID = 0xF10, + MISCREG_MVENDORID = 0xF11, + MISCREG_MARCHID = 0xF12, + MISCREG_MIMPID = 0xF13, + MISCREG_MHARTID = 0xF14, MISCREG_MSTATUS = 0x300, - MISCREG_MTVEC = 0x301, - MISCREG_MTDELEG = 0x302, + MISCREG_MISA = 0x301, + MISCREG_MEDELEG = 0x302, + MISCREG_MIDELEG = 0x303, MISCREG_MIE = 0x304, - MISCREG_MTIMECMP = 0x321, - MISCREG_MTIME = 0x701, - MISCREG_MTIMEH = 0x741, + MISCREG_MTVEC = 0x305, MISCREG_MSCRATCH = 0x340, MISCREG_MEPC = 0x341, MISCREG_MCAUSE = 0x342, @@ -171,10 +175,21 @@ enum MiscRegIndex { MISCREG_MIBOUND = 0x383, MISCREG_MDBASE = 0x384, MISCREG_MDBOUND = 0x385, - MISCREG_HTIMEW = 0xB01, - MISCREG_HTIMEHW = 0xB81, - MISCREG_MTOHOST = 0x780, - MISCREG_MFROMHOST = 0x781 + MISCREG_MCYCLE = 0xB00, + MISCREG_MINSTRET = 0xB02, + MISCREG_MHPMCOUNTER_BASE = 0xB03, + MISCREG_MUCOUNTEREN = 0x320, + MISCREG_MSCOUNTEREN = 0x321, + MISCREG_MHCOUNTEREN = 0x322, + MISCREG_MHPMEVENT_BASE = 0x323, + + MISCREG_TSELECT = 0x7A0, + MISCREG_TDATA1 = 0x7A1, + MISCREG_TDATA2 = 0x7A2, + MISCREG_TDATA3 = 0x7A3, + MISCREG_DCSR = 0x7B0, + MISCREG_DPC = 0x7B1, + MISCREG_DSCRATCH = 0x7B2 }; } |