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-rw-r--r--src/arch/sparc/faults.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/sparc/faults.cc b/src/arch/sparc/faults.cc
index da7fc730d..1a44d34cf 100644
--- a/src/arch/sparc/faults.cc
+++ b/src/arch/sparc/faults.cc
@@ -291,9 +291,9 @@ void doNormalFault(ThreadContext *tc, TrapType tt)
//Update the global register level
if(1/*We're delivering the trap in priveleged mode*/)
- tc->setMiscReg(MISCREG_GL, max<int>(GL+1, MaxGL));
+ tc->setMiscReg(MISCREG_GL, min<int>(GL+1, MaxGL));
else
- tc->setMiscReg(MISCREG_GL, max<int>(GL+1, MaxPGL));
+ tc->setMiscReg(MISCREG_GL, min<int>(GL+1, MaxPGL));
//PSTATE.mm is unchanged
//PSTATE.pef = whether or not an fpu is present