diff options
Diffstat (limited to 'src/arch/sparc/isa.cc')
| -rw-r--r-- | src/arch/sparc/isa.cc | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/arch/sparc/isa.cc b/src/arch/sparc/isa.cc index 3456029c4..f75d00645 100644 --- a/src/arch/sparc/isa.cc +++ b/src/arch/sparc/isa.cc @@ -173,7 +173,7 @@ ISA::clear() panic("Tick comparison event active when clearing the ISA object.\n"); } -MiscReg +RegVal ISA::readMiscRegNoEffect(int miscReg) const { @@ -248,7 +248,7 @@ ISA::readMiscRegNoEffect(int miscReg) const case MISCREG_TBA: return tba; case MISCREG_PSTATE: - return (MiscReg)pstate; + return (RegVal)pstate; case MISCREG_TL: return tl; case MISCREG_PIL: @@ -271,7 +271,7 @@ ISA::readMiscRegNoEffect(int miscReg) const /** Hyper privileged registers */ case MISCREG_HPSTATE: - return (MiscReg)hpstate; + return (RegVal)hpstate; case MISCREG_HTSTATE: return htstate[tl-1]; case MISCREG_HINTP: @@ -334,7 +334,7 @@ ISA::readMiscRegNoEffect(int miscReg) const } } -MiscReg +RegVal ISA::readMiscReg(int miscReg, ThreadContext * tc) { switch (miscReg) { @@ -383,7 +383,7 @@ ISA::readMiscReg(int miscReg, ThreadContext * tc) } void -ISA::setMiscRegNoEffect(int miscReg, MiscReg val) +ISA::setMiscRegNoEffect(int miscReg, RegVal val) { switch (miscReg) { // case MISCREG_Y: @@ -564,9 +564,9 @@ ISA::setMiscRegNoEffect(int miscReg, MiscReg val) } void -ISA::setMiscReg(int miscReg, MiscReg val, ThreadContext * tc) +ISA::setMiscReg(int miscReg, RegVal val, ThreadContext * tc) { - MiscReg new_val = val; + RegVal new_val = val; switch (miscReg) { case MISCREG_ASI: |