diff options
Diffstat (limited to 'src/arch/sparc/isa.hh')
| -rw-r--r-- | src/arch/sparc/isa.hh | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/arch/sparc/isa.hh b/src/arch/sparc/isa.hh index 82fee0d00..9209ba3de 100644 --- a/src/arch/sparc/isa.hh +++ b/src/arch/sparc/isa.hh @@ -116,7 +116,7 @@ class ISA : public SimObject // These need to check the int_dis field and if 0 then // set appropriate bit in softint and checkinterrutps on the cpu - void setFSReg(int miscReg, const MiscReg &val, ThreadContext *tc); + void setFSReg(int miscReg, MiscReg val, ThreadContext *tc); MiscReg readFSReg(int miscReg, ThreadContext * tc); // Update interrupt state on softint or pil change @@ -186,9 +186,8 @@ class ISA : public SimObject MiscReg readMiscRegNoEffect(int miscReg) const; MiscReg readMiscReg(int miscReg, ThreadContext *tc); - void setMiscRegNoEffect(int miscReg, const MiscReg val); - void setMiscReg(int miscReg, const MiscReg val, - ThreadContext *tc); + void setMiscRegNoEffect(int miscReg, MiscReg val); + void setMiscReg(int miscReg, MiscReg val, ThreadContext *tc); RegId flattenRegId(const RegId& regId) const |