diff options
Diffstat (limited to 'src/arch/sparc/isa.hh')
| -rw-r--r-- | src/arch/sparc/isa.hh | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/arch/sparc/isa.hh b/src/arch/sparc/isa.hh index 18ac30857..ded5b34ff 100644 --- a/src/arch/sparc/isa.hh +++ b/src/arch/sparc/isa.hh @@ -37,6 +37,7 @@ #include "arch/sparc/registers.hh" #include "arch/sparc/types.hh" #include "cpu/cpuevent.hh" +#include "cpu/reg_class.hh" #include "sim/sim_object.hh" class Checkpoint; @@ -189,6 +190,22 @@ class ISA : public SimObject void setMiscReg(int miscReg, const MiscReg val, ThreadContext *tc); + RegId + flattenRegId(const RegId& regId) const + { + switch (regId.classValue()) { + case IntRegClass: + return RegId(IntRegClass, flattenIntIndex(regId.index())); + case FloatRegClass: + return RegId(FloatRegClass, flattenFloatIndex(regId.index())); + case CCRegClass: + return RegId(CCRegClass, flattenCCIndex(regId.index())); + case MiscRegClass: + return RegId(MiscRegClass, flattenMiscIndex(regId.index())); + } + return regId; + } + int flattenIntIndex(int reg) const { |