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-rw-r--r--src/arch/sparc/isa/decoder.isa425
1 files changed, 265 insertions, 160 deletions
diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa
index 425ebc9d0..81443fecb 100644
--- a/src/arch/sparc/isa/decoder.isa
+++ b/src/arch/sparc/isa/decoder.isa
@@ -62,8 +62,8 @@ decode OP default Unknown::unknown()
NNPC = NNPC;//Don't do anything
}});
0x1: bpn(19, {{
- NPC = xc->readNextPC() + 4;
- NNPC = NPC + 4;
+ NNPC = NPC + 8;
+ NPC = NPC + 4;
}}, ',a');
}
default: decode BPCC
@@ -103,8 +103,8 @@ decode OP default Unknown::unknown()
NNPC = NNPC;//Don't do anything
}});
0x1: bn(22, {{
- NPC = xc->readNextPC() + 4;
- NNPC = NPC + 4;
+ NNPC = NPC + 8;
+ NPC = NPC + 4;
}}, ',a');
}
default: bicc(22, {{
@@ -159,8 +159,92 @@ decode OP default Unknown::unknown()
}
//SETHI (or NOP if rd == 0 and imm == 0)
0x4: SetHi::sethi({{Rd.udw = imm;}});
- 0x5: Trap::fbpfcc({{fault = new FpDisabled;}});
- 0x6: Trap::fbfcc({{fault = new FpDisabled;}});
+ //fbpfcc
+ 0x5: decode COND2 {
+ format BranchN {
+ //Branch Always
+ 0x8: decode A
+ {
+ 0x0: fbpa(22, {{
+ NNPC = xc->readPC() + disp;
+ }});
+ 0x1: fbpa(22, {{
+ NPC = xc->readPC() + disp;
+ NNPC = NPC + 4;
+ }}, ',a');
+ }
+ //Branch Never
+ 0x0: decode A
+ {
+ 0x0: fbpn(22, {{
+ NNPC = NNPC;//Don't do anything
+ }});
+ 0x1: fbpn(22, {{
+ NNPC = NPC + 8;
+ NPC = NPC + 4;
+ }}, ',a');
+ }
+ default: decode BPCC {
+ 0x0: fbpcc0(22, {{
+ if(passesFpCondition(Fsr<11:10>, COND2))
+ NNPC = xc->readPC() + disp;
+ else
+ handle_annul
+ }});
+ 0x1: fbpcc1(22, {{
+ if(passesFpCondition(Fsr<33:32>, COND2))
+ NNPC = xc->readPC() + disp;
+ else
+ handle_annul
+ }});
+ 0x2: fbpcc2(22, {{
+ if(passesFpCondition(Fsr<35:34>, COND2))
+ NNPC = xc->readPC() + disp;
+ else
+ handle_annul
+ }});
+ 0x3: fbpcc3(22, {{
+ if(passesFpCondition(Fsr<37:36>, COND2))
+ NNPC = xc->readPC() + disp;
+ else
+ handle_annul
+ }});
+ }
+ }
+ }
+ //fbfcc
+ 0x6: decode COND2 {
+ format BranchN {
+ //Branch Always
+ 0x8: decode A
+ {
+ 0x0: fba(22, {{
+ NNPC = xc->readPC() + disp;
+ }});
+ 0x1: fba(22, {{
+ NPC = xc->readPC() + disp;
+ NNPC = NPC + 4;
+ }}, ',a');
+ }
+ //Branch Never
+ 0x0: decode A
+ {
+ 0x0: fbn(22, {{
+ NNPC = NNPC;//Don't do anything
+ }});
+ 0x1: fbn(22, {{
+ NNPC = NPC + 8;
+ NPC = NPC + 4;
+ }}, ',a');
+ }
+ default: fbfcc(22, {{
+ if(passesFpCondition(Fsr<11:10>, COND2))
+ NNPC = xc->readPC() + disp;
+ else
+ handle_annul
+ }});
+ }
+ }
}
0x1: BranchN::call(30, {{
if (Pstate<3:>)
@@ -186,7 +270,7 @@ decode OP default Unknown::unknown()
Y = Rd<63:32>;
}});
0x0B: smul({{
- Rd.sdw = sext<32>(Rs1.sdw) * sext<32>(Rs2_or_imm13);
+ Rd.sdw = sext<32>(Rs1.sdw<31:0>) * sext<32>(Rs2_or_imm13<31:0>);
Y = Rd.sdw<63:32>;
}});
0x0C: subc({{Rd.sdw = Rs1.sdw + (~Rs2_or_imm13) + 1 - Ccr<0:0>}});
@@ -246,33 +330,29 @@ decode OP default Unknown::unknown()
Rd = resTemp = Rs1 + val2 + carryin;}},
{{(Rs1<31:0> + val2<31:0> + carryin)<32:>}},
{{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}},
- {{(Rs1<63:1> + val2<63:1> +
- ((Rs1 & val2) | (carryin & (Rs1 | val2)))<0:>)<63:>}},
+ {{((Rs1 & val2) | (~resTemp & (Rs1 | val2)))<63:>}},
{{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
);
- 0x1A: umulcc({{
+ 0x1A: IntOpCcRes::umulcc({{
uint64_t resTemp;
Rd = resTemp = Rs1.udw<31:0> * Rs2_or_imm13.udw<31:0>;
- Y = resTemp<63:32>;}},
- {{0}},{{0}},{{0}},{{0}});
- 0x1B: smulcc({{
+ Y = resTemp<63:32>;}});
+ 0x1B: IntOpCcRes::smulcc({{
int64_t resTemp;
- Rd = resTemp = sext<32>(Rs1.sdw) * sext<32>(Rs2_or_imm13);
- Y = resTemp<63:32>;}},
- {{0}},{{0}},{{0}},{{0}});
+ Rd = resTemp = sext<32>(Rs1.sdw<31:0>) * sext<32>(Rs2_or_imm13<31:0>);
+ Y = resTemp<63:32>;}});
0x1C: subccc({{
int64_t resTemp, val2 = Rs2_or_imm13;
int64_t carryin = Ccr<0:0>;
Rd = resTemp = Rs1 + ~val2 + 1 - carryin;}},
- {{(~((Rs1<31:0> + (~(val2 + carryin))<31:0> + 1))<32:>)}},
+ {{((~Rs1 & val2) | (resTemp & (~Rs1 | val2)))<31:>}},
{{Rs1<31:> != val2<31:> && Rs1<31:> != resTemp<31:>}},
- {{(~((Rs1<63:1> + (~(val2 + carryin))<63:1>) + (Rs1<0:> + (~(val2+carryin))<0:> + 1)<63:1>))<63:>}},
+ {{((~Rs1 & val2) | (resTemp & (~Rs1 | val2)))<63:>}},
{{Rs1<63:> != val2<63:> && Rs1<63:> != resTemp<63:>}}
);
- 0x1D: udivxcc({{
+ 0x1D: IntOpCcRes::udivxcc({{
if(Rs2_or_imm13.udw == 0) fault = new DivisionByZero;
- else Rd = Rs1.udw / Rs2_or_imm13.udw;}}
- ,{{0}},{{0}},{{0}},{{0}});
+ else Rd = Rs1.udw / Rs2_or_imm13.udw;}});
0x1E: udivcc({{
uint32_t resTemp, val2 = Rs2_or_imm13.udw;
int32_t overflow = 0;
@@ -502,20 +582,7 @@ decode OP default Unknown::unknown()
if(Rs2_or_imm13.sdw == 0) fault = new DivisionByZero;
else Rd.sdw = Rs1.sdw / Rs2_or_imm13.sdw;
}});
- 0x2E: decode RS1 {
- 0x0: IntOp::popc({{
- int64_t count = 0;
- uint64_t temp = Rs2_or_imm13;
- //Count the 1s in the front 4bits until none are left
- uint8_t oneBits[] = {0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4};
- while(temp)
- {
- count += oneBits[temp & 0xF];
- temp = temp >> 4;
- }
- Rd = count;
- }});
- }
+ 0x2E: Trap::popc({{fault = new IllegalInstruction;}});
0x2F: decode RCOND3
{
0x1: movreq({{Rd = (Rs1.sdw == 0) ? Rs2_or_imm10 : Rd;}});
@@ -664,7 +731,7 @@ decode OP default Unknown::unknown()
Fsr &= ~(7 << 14);
Fsr &= ~(0x1F);
}});
- 0x03: Trap::fmovq({{fault = new FpDisabled;}});
+ 0x03: FpUnimpl::fmovq();
0x05: fnegs({{
Frds.uw = Frs2s.uw ^ (1UL << 31);
//fsr.ftt = fsr.cexc = 0
@@ -677,7 +744,7 @@ decode OP default Unknown::unknown()
Fsr &= ~(7 << 14);
Fsr &= ~(0x1F);
}});
- 0x07: Trap::fnegq({{fault = new FpDisabled;}});
+ 0x07: FpUnimpl::fnegq();
0x09: fabss({{
Frds.uw = ((1UL << 31) - 1) & Frs2s.uw;
//fsr.ftt = fsr.cexc = 0
@@ -690,106 +757,168 @@ decode OP default Unknown::unknown()
Fsr &= ~(7 << 14);
Fsr &= ~(0x1F);
}});
- 0x0B: Trap::fabsq({{fault = new FpDisabled;}});
- 0x29: fsqrts({{Frds.sf = sqrt(Frs2s.sf);}});
- 0x2A: fsqrtd({{Frd.df = sqrt(Frs2.df);}});
- 0x2B: Trap::fsqrtq({{fault = new FpDisabled;}});
+ 0x0B: FpUnimpl::fabsq();
+ 0x29: fsqrts({{Frds.sf = std::sqrt(Frs2s.sf);}});
+ 0x2A: fsqrtd({{Frd.df = std::sqrt(Frs2.df);}});
+ 0x2B: FpUnimpl::fsqrtq();
0x41: fadds({{Frds.sf = Frs1s.sf + Frs2s.sf;}});
0x42: faddd({{Frd.df = Frs1.df + Frs2.df;}});
- 0x43: Trap::faddq({{fault = new FpDisabled;}});
+ 0x43: FpUnimpl::faddq();
0x45: fsubs({{Frds.sf = Frs1s.sf - Frs2s.sf;}});
0x46: fsubd({{Frd.df = Frs1.df - Frs2.df;}});
- 0x47: Trap::fsubq({{fault = new FpDisabled;}});
+ 0x47: FpUnimpl::fsubq();
0x49: fmuls({{Frds.sf = Frs1s.sf * Frs2s.sf;}});
0x4A: fmuld({{Frd.df = Frs1.df * Frs2.df;}});
- 0x4B: Trap::fmulq({{fault = new FpDisabled;}});
+ 0x4B: FpUnimpl::fmulq();
0x4D: fdivs({{Frds.sf = Frs1s.sf / Frs2s.sf;}});
0x4E: fdivd({{Frd.df = Frs1.df / Frs2.df;}});
- 0x4F: Trap::fdivq({{fault = new FpDisabled;}});
+ 0x4F: FpUnimpl::fdivq();
0x69: fsmuld({{Frd.df = Frs1s.sf * Frs2s.sf;}});
- 0x6E: Trap::fdmulq({{fault = new FpDisabled;}});
+ 0x6E: FpUnimpl::fdmulq();
0x81: fstox({{
Frd.df = (double)static_cast<int64_t>(Frs2s.sf);
}});
0x82: fdtox({{
Frd.df = (double)static_cast<int64_t>(Frs2.df);
}});
- 0x83: Trap::fqtox({{fault = new FpDisabled;}});
+ 0x83: FpUnimpl::fqtox();
0x84: fxtos({{
Frds.sf = static_cast<float>((int64_t)Frs2.df);
}});
0x88: fxtod({{
Frd.df = static_cast<double>((int64_t)Frs2.df);
}});
- 0x8C: Trap::fxtoq({{fault = new FpDisabled;}});
+ 0x8C: FpUnimpl::fxtoq();
0xC4: fitos({{
Frds.sf = static_cast<float>((int32_t)Frs2s.sf);
}});
0xC6: fdtos({{Frds.sf = Frs2.df;}});
- 0xC7: Trap::fqtos({{fault = new FpDisabled;}});
+ 0xC7: FpUnimpl::fqtos();
0xC8: fitod({{
Frd.df = static_cast<double>((int32_t)Frs2s.sf);
}});
0xC9: fstod({{Frd.df = Frs2s.sf;}});
- 0xCB: Trap::fqtod({{fault = new FpDisabled;}});
- 0xCC: Trap::fitoq({{fault = new FpDisabled;}});
- 0xCD: Trap::fstoq({{fault = new FpDisabled;}});
- 0xCE: Trap::fdtoq({{fault = new FpDisabled;}});
+ 0xCB: FpUnimpl::fqtod();
+ 0xCC: FpUnimpl::fitoq();
+ 0xCD: FpUnimpl::fstoq();
+ 0xCE: FpUnimpl::fdtoq();
0xD1: fstoi({{
Frds.sf = (float)static_cast<int32_t>(Frs2s.sf);
}});
0xD2: fdtoi({{
Frds.sf = (float)static_cast<int32_t>(Frs2.df);
}});
- 0xD3: Trap::fqtoi({{fault = new FpDisabled;}});
- default: Trap::fpop1({{fault = new FpDisabled;}});
+ 0xD3: FpUnimpl::fqtoi();
+ default: FailUnimpl::fpop1();
+ }
+ }
+ 0x35: decode OPF{
+ format BasicOperate{
+ 0x51: fcmps({{
+ uint8_t fcc;
+ if(isnan(Frs1s) || isnan(Frs2s))
+ fcc = 3;
+ else if(Frs1s < Frs2s)
+ fcc = 1;
+ else if(Frs1s > Frs2s)
+ fcc = 2;
+ else
+ fcc = 0;
+ uint8_t firstbit = 10;
+ if(FCMPCC)
+ firstbit = FCMPCC * 2 + 30;
+ Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc);
+ }});
+ 0x52: fcmpd({{
+ uint8_t fcc;
+ if(isnan(Frs1s) || isnan(Frs2s))
+ fcc = 3;
+ else if(Frs1s < Frs2s)
+ fcc = 1;
+ else if(Frs1s > Frs2s)
+ fcc = 2;
+ else
+ fcc = 0;
+ uint8_t firstbit = 10;
+ if(FCMPCC)
+ firstbit = FCMPCC * 2 + 30;
+ Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc);
+ }});
+ 0x53: FpUnimpl::fcmpq();
+ 0x55: fcmpes({{
+ uint8_t fcc = 0;
+ if(isnan(Frs1s) || isnan(Frs2s))
+ fault = new FpExceptionIEEE754;
+ if(Frs1s < Frs2s)
+ fcc = 1;
+ else if(Frs1s > Frs2s)
+ fcc = 2;
+ uint8_t firstbit = 10;
+ if(FCMPCC)
+ firstbit = FCMPCC * 2 + 30;
+ Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc);
+ }});
+ 0x56: fcmped({{
+ uint8_t fcc = 0;
+ if(isnan(Frs1s) || isnan(Frs2s))
+ fault = new FpExceptionIEEE754;
+ if(Frs1s < Frs2s)
+ fcc = 1;
+ else if(Frs1s > Frs2s)
+ fcc = 2;
+ uint8_t firstbit = 10;
+ if(FCMPCC)
+ firstbit = FCMPCC * 2 + 30;
+ Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc);
+ }});
+ 0x57: FpUnimpl::fcmpeq();
+ default: FailUnimpl::fpop2();
}
}
- 0x35: Trap::fpop2({{fault = new FpDisabled;}});
//This used to be just impdep1, but now it's a whole bunch
//of instructions
0x36: decode OPF{
- 0x00: Trap::edge8({{fault = new IllegalInstruction;}});
- 0x01: Trap::edge8n({{fault = new IllegalInstruction;}});
- 0x02: Trap::edge8l({{fault = new IllegalInstruction;}});
- 0x03: Trap::edge8ln({{fault = new IllegalInstruction;}});
- 0x04: Trap::edge16({{fault = new IllegalInstruction;}});
- 0x05: Trap::edge16n({{fault = new IllegalInstruction;}});
- 0x06: Trap::edge16l({{fault = new IllegalInstruction;}});
- 0x07: Trap::edge16ln({{fault = new IllegalInstruction;}});
- 0x08: Trap::edge32({{fault = new IllegalInstruction;}});
- 0x09: Trap::edge32n({{fault = new IllegalInstruction;}});
- 0x0A: Trap::edge32l({{fault = new IllegalInstruction;}});
- 0x0B: Trap::edge32ln({{fault = new IllegalInstruction;}});
- 0x10: Trap::array8({{fault = new IllegalInstruction;}});
- 0x12: Trap::array16({{fault = new IllegalInstruction;}});
- 0x14: Trap::array32({{fault = new IllegalInstruction;}});
+ 0x00: FailUnimpl::edge8();
+ 0x01: FailUnimpl::edge8n();
+ 0x02: FailUnimpl::edge8l();
+ 0x03: FailUnimpl::edge8ln();
+ 0x04: FailUnimpl::edge16();
+ 0x05: FailUnimpl::edge16n();
+ 0x06: FailUnimpl::edge16l();
+ 0x07: FailUnimpl::edge16ln();
+ 0x08: FailUnimpl::edge32();
+ 0x09: FailUnimpl::edge32n();
+ 0x0A: FailUnimpl::edge32l();
+ 0x0B: FailUnimpl::edge32ln();
+ 0x10: FailUnimpl::array8();
+ 0x12: FailUnimpl::array16();
+ 0x14: FailUnimpl::array32();
0x18: BasicOperate::alignaddr({{
uint64_t sum = Rs1 + Rs2;
Rd = sum & ~7;
Gsr = (Gsr & ~7) | (sum & 7);
}});
- 0x19: Trap::bmask({{fault = new IllegalInstruction;}});
+ 0x19: FailUnimpl::bmask();
0x1A: BasicOperate::alignaddresslittle({{
uint64_t sum = Rs1 + Rs2;
Rd = sum & ~7;
Gsr = (Gsr & ~7) | ((~sum + 1) & 7);
}});
- 0x20: Trap::fcmple16({{fault = new IllegalInstruction;}});
- 0x22: Trap::fcmpne16({{fault = new IllegalInstruction;}});
- 0x24: Trap::fcmple32({{fault = new IllegalInstruction;}});
- 0x26: Trap::fcmpne32({{fault = new IllegalInstruction;}});
- 0x28: Trap::fcmpgt16({{fault = new IllegalInstruction;}});
- 0x2A: Trap::fcmpeq16({{fault = new IllegalInstruction;}});
- 0x2C: Trap::fcmpgt32({{fault = new IllegalInstruction;}});
- 0x2E: Trap::fcmpeq32({{fault = new IllegalInstruction;}});
- 0x31: Trap::fmul8x16({{fault = new IllegalInstruction;}});
- 0x33: Trap::fmul8x16au({{fault = new IllegalInstruction;}});
- 0x35: Trap::fmul8x16al({{fault = new IllegalInstruction;}});
- 0x36: Trap::fmul8sux16({{fault = new IllegalInstruction;}});
- 0x37: Trap::fmul8ulx16({{fault = new IllegalInstruction;}});
- 0x38: Trap::fmuld8sux16({{fault = new IllegalInstruction;}});
- 0x39: Trap::fmuld8ulx16({{fault = new IllegalInstruction;}});
+ 0x20: FailUnimpl::fcmple16();
+ 0x22: FailUnimpl::fcmpne16();
+ 0x24: FailUnimpl::fcmple32();
+ 0x26: FailUnimpl::fcmpne32();
+ 0x28: FailUnimpl::fcmpgt16();
+ 0x2A: FailUnimpl::fcmpeq16();
+ 0x2C: FailUnimpl::fcmpgt32();
+ 0x2E: FailUnimpl::fcmpeq32();
+ 0x31: FailUnimpl::fmul8x16();
+ 0x33: FailUnimpl::fmul8x16au();
+ 0x35: FailUnimpl::fmul8x16al();
+ 0x36: FailUnimpl::fmul8sux16();
+ 0x37: FailUnimpl::fmul8ulx16();
+ 0x38: FailUnimpl::fmuld8sux16();
+ 0x39: FailUnimpl::fmuld8ulx16();
0x3A: Trap::fpack32({{fault = new IllegalInstruction;}});
0x3B: Trap::fpack16({{fault = new IllegalInstruction;}});
0x3D: Trap::fpackfix({{fault = new IllegalInstruction;}});
@@ -821,58 +950,58 @@ decode OP default Unknown::unknown()
}
}});
0x4B: Trap::fpmerge({{fault = new IllegalInstruction;}});
- 0x4C: Trap::bshuffle({{fault = new IllegalInstruction;}});
- 0x4D: Trap::fexpand({{fault = new IllegalInstruction;}});
- 0x50: Trap::fpadd16({{fault = new IllegalInstruction;}});
- 0x51: Trap::fpadd16s({{fault = new IllegalInstruction;}});
- 0x52: Trap::fpadd32({{fault = new IllegalInstruction;}});
- 0x53: Trap::fpadd32s({{fault = new IllegalInstruction;}});
- 0x54: Trap::fpsub16({{fault = new IllegalInstruction;}});
- 0x55: Trap::fpsub16s({{fault = new IllegalInstruction;}});
- 0x56: Trap::fpsub32({{fault = new IllegalInstruction;}});
- 0x57: Trap::fpsub32s({{fault = new IllegalInstruction;}});
+ 0x4C: FailUnimpl::bshuffle();
+ 0x4D: FailUnimpl::fexpand();
+ 0x50: FailUnimpl::fpadd16();
+ 0x51: FailUnimpl::fpadd16s();
+ 0x52: FailUnimpl::fpadd32();
+ 0x53: FailUnimpl::fpadd32s();
+ 0x54: FailUnimpl::fpsub16();
+ 0x55: FailUnimpl::fpsub16s();
+ 0x56: FailUnimpl::fpsub32();
+ 0x57: FailUnimpl::fpsub32s();
0x60: BasicOperate::fzero({{Frd.df = 0;}});
0x61: BasicOperate::fzeros({{Frds.sf = 0;}});
- 0x62: Trap::fnor({{fault = new IllegalInstruction;}});
- 0x63: Trap::fnors({{fault = new IllegalInstruction;}});
- 0x64: Trap::fandnot2({{fault = new IllegalInstruction;}});
- 0x65: Trap::fandnot2s({{fault = new IllegalInstruction;}});
+ 0x62: FailUnimpl::fnor();
+ 0x63: FailUnimpl::fnors();
+ 0x64: FailUnimpl::fandnot2();
+ 0x65: FailUnimpl::fandnot2s();
0x66: BasicOperate::fnot2({{
Frd.df = (double)(~((uint64_t)Frs2.df));
}});
0x67: BasicOperate::fnot2s({{
Frds.sf = (float)(~((uint32_t)Frs2s.sf));
}});
- 0x68: Trap::fandnot1({{fault = new IllegalInstruction;}});
- 0x69: Trap::fandnot1s({{fault = new IllegalInstruction;}});
+ 0x68: FailUnimpl::fandnot1();
+ 0x69: FailUnimpl::fandnot1s();
0x6A: BasicOperate::fnot1({{
Frd.df = (double)(~((uint64_t)Frs1.df));
}});
0x6B: BasicOperate::fnot1s({{
Frds.sf = (float)(~((uint32_t)Frs1s.sf));
}});
- 0x6C: Trap::fxor({{fault = new IllegalInstruction;}});
- 0x6D: Trap::fxors({{fault = new IllegalInstruction;}});
- 0x6E: Trap::fnand({{fault = new IllegalInstruction;}});
- 0x6F: Trap::fnands({{fault = new IllegalInstruction;}});
- 0x70: Trap::fand({{fault = new IllegalInstruction;}});
- 0x71: Trap::fands({{fault = new IllegalInstruction;}});
- 0x72: Trap::fxnor({{fault = new IllegalInstruction;}});
- 0x73: Trap::fxnors({{fault = new IllegalInstruction;}});
+ 0x6C: FailUnimpl::fxor();
+ 0x6D: FailUnimpl::fxors();
+ 0x6E: FailUnimpl::fnand();
+ 0x6F: FailUnimpl::fnands();
+ 0x70: FailUnimpl::fand();
+ 0x71: FailUnimpl::fands();
+ 0x72: FailUnimpl::fxnor();
+ 0x73: FailUnimpl::fxnors();
0x74: BasicOperate::fsrc1({{Frd.udw = Frs1.udw;}});
- 0x75: BasicOperate::fsrc1s({{Frd.uw = Frs1.uw;}});
- 0x76: Trap::fornot2({{fault = new IllegalInstruction;}});
- 0x77: Trap::fornot2s({{fault = new IllegalInstruction;}});
+ 0x75: BasicOperate::fsrc1s({{Frds.uw = Frs1s.uw;}});
+ 0x76: FailUnimpl::fornot2();
+ 0x77: FailUnimpl::fornot2s();
0x78: BasicOperate::fsrc2({{Frd.udw = Frs2.udw;}});
- 0x79: BasicOperate::fsrc2s({{Frd.uw = Frs2.uw;}});
- 0x7A: Trap::fornot1({{fault = new IllegalInstruction;}});
- 0x7B: Trap::fornot1s({{fault = new IllegalInstruction;}});
- 0x7C: Trap::for({{fault = new IllegalInstruction;}});
- 0x7D: Trap::fors({{fault = new IllegalInstruction;}});
- 0x7E: Trap::fone({{fault = new IllegalInstruction;}});
- 0x7F: Trap::fones({{fault = new IllegalInstruction;}});
+ 0x79: BasicOperate::fsrc2s({{Frds.uw = Frs2s.uw;}});
+ 0x7A: FailUnimpl::fornot1();
+ 0x7B: FailUnimpl::fornot1s();
+ 0x7C: FailUnimpl::for();
+ 0x7D: FailUnimpl::fors();
+ 0x7E: BasicOperate::fone({{Frd.udw = std::numeric_limits<uint64_t>::max();}});
+ 0x7F: BasicOperate::fones({{Frds.uw = std::numeric_limits<uint32_t>::max();}});
0x80: Trap::shutdown({{fault = new IllegalInstruction;}});
- 0x81: Trap::siam({{fault = new IllegalInstruction;}});
+ 0x81: FailUnimpl::siam();
}
0x37: Trap::impdep2({{fault = new IllegalInstruction;}});
0x38: Branch::jmpl({{
@@ -889,16 +1018,11 @@ decode OP default Unknown::unknown()
}
}});
0x39: Branch::return({{
- //If both MemAddressNotAligned and
- //a fill trap happen, it's not clear
- //which one should be returned.
Addr target = Rs1 + Rs2_or_imm13;
- if(target & 0x3)
- fault = new MemAddressNotAligned;
- else
- NNPC = target;
if(fault == NoFault)
{
+ //Check for fills which are higher priority than alignment
+ //faults.
if(Canrestore == 0)
{
if(Otherwin)
@@ -906,18 +1030,15 @@ decode OP default Unknown::unknown()
else
fault = new FillNNormal(4*Wstate<2:0>);
}
+ //Check for alignment faults
+ else if(target & 0x3)
+ fault = new MemAddressNotAligned;
else
{
- //CWP should be set directly so that it always happens
- //Also, this will allow writing to the new window and
- //reading from the old one
+ NNPC = target;
Cwp = (Cwp - 1 + NWindows) % NWindows;
Cansave = Cansave + 1;
Canrestore = Canrestore - 1;
- //This is here to make sure the CWP is written
- //no matter what. This ensures that the results
- //are written in the new window as well.
- xc->setMiscRegWithEffect(MISCREG_CWP, Cwp);
}
}
}});
@@ -935,7 +1056,7 @@ decode OP default Unknown::unknown()
xc->syscall(R1);
#endif
}
- }});
+ }}, IsSerializeAfter, IsNonSpeculative);
0x2: Trap::tccx({{
if(passesCondition(Ccr<7:4>, COND2))
{
@@ -948,36 +1069,27 @@ decode OP default Unknown::unknown()
xc->syscall(R1);
#endif
}
- }});
+ }}, IsSerializeAfter, IsNonSpeculative);
}
0x3B: Nop::flush({{/*Instruction memory flush*/}});
0x3C: save({{
- //CWP should be set directly so that it always happens
- //Also, this will allow writing to the new window and
- //reading from the old one
if(Cansave == 0)
{
if(Otherwin)
fault = new SpillNOther(4*Wstate<5:3>);
else
fault = new SpillNNormal(4*Wstate<2:0>);
- //Cwp = (Cwp + 2) % NWindows;
}
else if(Cleanwin - Canrestore == 0)
{
- //Cwp = (Cwp + 1) % NWindows;
fault = new CleanWindow;
}
else
{
Cwp = (Cwp + 1) % NWindows;
- Rd = Rs1 + Rs2_or_imm13;
+ Rd_next = Rs1 + Rs2_or_imm13;
Cansave = Cansave - 1;
Canrestore = Canrestore + 1;
- //This is here to make sure the CWP is written
- //no matter what. This ensures that the results
- //are written in the new window as well.
- xc->setMiscRegWithEffect(MISCREG_CWP, Cwp);
}
}});
0x3D: restore({{
@@ -990,17 +1102,10 @@ decode OP default Unknown::unknown()
}
else
{
- //CWP should be set directly so that it always happens
- //Also, this will allow writing to the new window and
- //reading from the old one
Cwp = (Cwp - 1 + NWindows) % NWindows;
- Rd = Rs1 + Rs2_or_imm13;
+ Rd_prev = Rs1 + Rs2_or_imm13;
Cansave = Cansave + 1;
Canrestore = Canrestore - 1;
- //This is here to make sure the CWP is written
- //no matter what. This ensures that the results
- //are written in the new window as well.
- xc->setMiscRegWithEffect(MISCREG_CWP, Cwp);
}
}});
0x3E: decode FCN {
@@ -1130,14 +1235,14 @@ decode OP default Unknown::unknown()
{{ Mem.uw = Rd.uw;
Rd.uw = uReg0;}}, {{EXT_ASI}});
format Trap {
- 0x20: Load::ldf({{Frd.uw = Mem.uw;}});
+ 0x20: Load::ldf({{Frds.uw = Mem.uw;}});
0x21: decode X {
0x0: Load::ldfsr({{Fsr = Mem.uw | Fsr<63:32>;}});
0x1: Load::ldxfsr({{Fsr = Mem.udw;}});
}
0x22: ldqf({{fault = new FpDisabled;}});
0x23: Load::lddf({{Frd.udw = Mem.udw;}});
- 0x24: Store::stf({{Mem.uw = Frd.uw;}});
+ 0x24: Store::stf({{Mem.uw = Frds.uw;}});
0x25: decode X {
0x0: Store::stfsr({{Mem.uw = Fsr<31:0>;}});
0x1: Store::stxfsr({{Mem.udw = Fsr;}});
@@ -1145,7 +1250,7 @@ decode OP default Unknown::unknown()
0x26: stqf({{fault = new FpDisabled;}});
0x27: Store::stdf({{Mem.udw = Frd.udw;}});
0x2D: Nop::prefetch({{ }});
- 0x30: LoadAlt::ldfa({{Frd.uw = Mem.uw;}}, {{EXT_ASI}});
+ 0x30: LoadAlt::ldfa({{Frds.uw = Mem.uw;}}, {{EXT_ASI}});
0x32: ldqfa({{fault = new FpDisabled;}});
format LoadAlt {
0x33: decode EXT_ASI {
@@ -1228,7 +1333,7 @@ decode OP default Unknown::unknown()
{{fault = new DataAccessException;}});
}
}
- 0x34: Store::stfa({{Mem.uw = Frd.uw;}});
+ 0x34: Store::stfa({{Mem.uw = Frds.uw;}});
0x36: stqfa({{fault = new FpDisabled;}});
format StoreAlt {
0x37: decode EXT_ASI {
generated by cgit v1.2.3 (git 2.25.1) at 2025-03-20 11:42:30 +0000