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-rw-r--r--src/arch/sparc/isa/formats/basic.isa3
-rw-r--r--src/arch/sparc/isa/formats/mem/util.isa6
2 files changed, 7 insertions, 2 deletions
diff --git a/src/arch/sparc/isa/formats/basic.isa b/src/arch/sparc/isa/formats/basic.isa
index a4c05387b..db6efd229 100644
--- a/src/arch/sparc/isa/formats/basic.isa
+++ b/src/arch/sparc/isa/formats/basic.isa
@@ -1,4 +1,4 @@
-// Copyright (c) 2006 The Regents of The University of Michigan
+// Copyright (c) 2006-2007 The Regents of The University of Michigan
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
@@ -71,6 +71,7 @@ def template BasicExecute {{
{
Fault fault = NoFault;
+ %(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
%(code)s;
diff --git a/src/arch/sparc/isa/formats/mem/util.isa b/src/arch/sparc/isa/formats/mem/util.isa
index b6e0945b7..3b02f58de 100644
--- a/src/arch/sparc/isa/formats/mem/util.isa
+++ b/src/arch/sparc/isa/formats/mem/util.isa
@@ -1,4 +1,4 @@
-// Copyright (c) 2006 The Regents of The University of Michigan
+// Copyright (c) 2006-2007 The Regents of The University of Michigan
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
@@ -141,6 +141,7 @@ def template LoadExecute {{
{
Fault fault = NoFault;
Addr EA;
+ %(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
%(ea_code)s;
@@ -169,6 +170,7 @@ def template LoadExecute {{
Fault fault = NoFault;
Addr EA;
uint%(mem_acc_size)s_t Mem;
+ %(fp_enable_check)s;
%(ea_decl)s;
%(ea_rd)s;
%(ea_code)s;
@@ -206,6 +208,7 @@ def template StoreExecute {{
//It should be optomized out in all the others
bool storeCond = true;
Addr EA;
+ %(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
%(ea_code)s;
@@ -235,6 +238,7 @@ def template StoreExecute {{
Fault fault = NoFault;
bool storeCond = true;
Addr EA;
+ %(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
%(ea_code)s;