2 files changed, 26 insertions, 7 deletions

diff --git a/src/arch/sparc/isa/formats/branch.isa b/src/arch/sparc/isa/formats/branch.isa
index faaee8842..e62e0035a 100644
--- a/src/arch/sparc/isa/formats/branch.isa
+++ b/src/arch/sparc/isa/formats/branch.isa
@@ -193,7 +193,7 @@ def template JumpExecute {{
             %(op_decl)s;
             %(op_rd)s;
 
-            NNPC = xc->readNextNPC();
+            PCS = PCS;
             %(code)s;
 
             if(fault == NoFault)
@@ -289,15 +289,24 @@ let {{
 
     def doCondBranch(name, Name, base, cond, code, opt_flags):
         return doBranch(name, Name, base, cond, code, code,
-                'NPC = NPC; NNPC = NNPC;',
-                'NNPC = NPC + 8; NPC = NPC + 4',
+                'PCS = PCS;',
+                '''
+                SparcISA::PCState pc = PCS;
+                pc.nnpc(pc.npc() + 8);
+                pc.npc(pc.npc() + 4);
+                PCS = pc;
+                ''',
                 opt_flags)
 
     def doUncondBranch(name, Name, base, code, annul_code, opt_flags):
         return doBranch(name, Name, base, "true", code, annul_code,
                 ";", ";", opt_flags)
 
-    default_branch_code = "NNPC = xc->readPC() + disp;"
+    default_branch_code = '''
+    SparcISA::PCState pc = PCS;
+    pc.nnpc(pc.pc() + disp);
+    PCS = pc;
+    '''
 }};
 
 // Format for branch instructions with n bit displacements:
diff --git a/src/arch/sparc/isa/formats/micro.isa b/src/arch/sparc/isa/formats/micro.isa
index c1d0c4f36..b5a53a68b 100644
--- a/src/arch/sparc/isa/formats/micro.isa
+++ b/src/arch/sparc/isa/formats/micro.isa
@@ -81,10 +81,11 @@ output header {{
 
             StaticInstPtr * microops;
 
-            StaticInstPtr fetchMicroop(MicroPC microPC)
+            StaticInstPtr
+            fetchMicroop(MicroPC upc) const
             {
-                assert(microPC < numMicroops);
-                return microops[microPC];
+                assert(upc < numMicroops);
+                return microops[upc];
             }
 
             %(MacroExecute)s
@@ -102,6 +103,15 @@ output header {{
             {
                 flags[IsMicroop] = true;
             }
+
+            void
+            advancePC(SparcISA::PCState &pcState) const
+            {
+                if (flags[IsLastMicroop])
+                    pcState.uEnd();
+                else
+                    pcState.uAdvance();
+            }
         };
 
         class SparcDelayedMicroInst : public SparcMicroInst