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-rw-r--r--src/arch/sparc/miscregfile.hh26
1 files changed, 15 insertions, 11 deletions
diff --git a/src/arch/sparc/miscregfile.hh b/src/arch/sparc/miscregfile.hh
index f74943256..cf0405ac4 100644
--- a/src/arch/sparc/miscregfile.hh
+++ b/src/arch/sparc/miscregfile.hh
@@ -42,15 +42,14 @@
namespace SparcISA
{
-
//These functions map register indices to names
std::string getMiscRegName(RegIndex);
enum MiscRegIndex
{
/** Ancillary State Registers */
- MISCREG_Y,
- MISCREG_CCR,
+// MISCREG_Y,
+// MISCREG_CCR,
MISCREG_ASI,
MISCREG_TICK,
MISCREG_FPRS,
@@ -75,11 +74,11 @@ namespace SparcISA
MISCREG_TL,
MISCREG_PIL,
MISCREG_CWP,
- MISCREG_CANSAVE,
- MISCREG_CANRESTORE,
- MISCREG_CLEANWIN,
- MISCREG_OTHERWIN,
- MISCREG_WSTATE,
+// MISCREG_CANSAVE,
+// MISCREG_CANRESTORE,
+// MISCREG_CLEANWIN,
+// MISCREG_OTHERWIN,
+// MISCREG_WSTATE,
MISCREG_GL,
/** Hyper privileged registers */
@@ -92,9 +91,14 @@ namespace SparcISA
MISCREG_HSTICK_CMPR,
/** Floating Point Status Register */
- MISCREG_FSR
+ MISCREG_FSR,
+
+ MISCREG_NUMMISCREGS
};
+ const int NumMiscArchRegs = MISCREG_NUMMISCREGS;
+ const int NumMiscRegs = MISCREG_NUMMISCREGS;
+
// The control registers, broken out into fields
class MiscRegFile
{
@@ -172,11 +176,11 @@ namespace SparcISA
#endif
public:
- void reset();
+ void clear();
MiscRegFile()
{
- reset();
+ clear();
}
MiscReg readReg(int miscReg);