1 files changed, 12 insertions, 11 deletions

diff --git a/src/arch/sparc/regfile.hh b/src/arch/sparc/regfile.hh
index e5192d684..db48b2d78 100644
--- a/src/arch/sparc/regfile.hh
+++ b/src/arch/sparc/regfile.hh
@@ -180,7 +180,7 @@ namespace SparcISA
         //Since the floating point registers overlap each other,
         //A generic storage space is used. The float to be returned is
         //pulled from the appropriate section of this region.
-        char regSpace[SingleWidth / 8 * NumFloatRegs];
+        char regSpace[(SingleWidth / 8) * NumFloatRegs];
 
       public:
 
@@ -198,15 +198,15 @@ namespace SparcISA
             {
               case SingleWidth:
                 float32_t result32;
-                memcpy(&result32, regSpace + 4 * floatReg, width);
+                memcpy(&result32, regSpace + 4 * floatReg, sizeof(result32));
                 return htog(result32);
               case DoubleWidth:
                 float64_t result64;
-                memcpy(&result64, regSpace + 4 * floatReg, width);
+                memcpy(&result64, regSpace + 4 * floatReg, sizeof(result64));
                 return htog(result64);
               case QuadWidth:
                 float128_t result128;
-                memcpy(&result128, regSpace + 4 * floatReg, width);
+                memcpy(&result128, regSpace + 4 * floatReg, sizeof(result128));
                 return htog(result128);
               default:
                 panic("Attempted to read a %d bit floating point register!", width);
@@ -222,15 +222,15 @@ namespace SparcISA
             {
               case SingleWidth:
                 uint32_t result32;
-                memcpy(&result32, regSpace + 4 * floatReg, width);
+                memcpy(&result32, regSpace + 4 * floatReg, sizeof(result32));
                 return htog(result32);
               case DoubleWidth:
                 uint64_t result64;
-                memcpy(&result64, regSpace + 4 * floatReg, width);
+                memcpy(&result64, regSpace + 4 * floatReg, sizeof(result64));
                 return htog(result64);
               case QuadWidth:
                 uint64_t result128;
-                memcpy(&result128, regSpace + 4 * floatReg, width);
+                memcpy(&result128, regSpace + 4 * floatReg, sizeof(result128));
                 return htog(result128);
               default:
                 panic("Attempted to read a %d bit floating point register!", width);
@@ -245,15 +245,16 @@ namespace SparcISA
 
             uint32_t result32;
             uint64_t result64;
+            DPRINTF(Sparc, "Setting floating point register %d\n", floatReg);
             switch(width)
             {
               case SingleWidth:
                 result32 = gtoh((uint32_t)val);
-                memcpy(regSpace + 4 * floatReg, &result32, width);
+                memcpy(regSpace + 4 * floatReg, &result32, sizeof(result32));
                 break;
               case DoubleWidth:
                 result64 = gtoh((uint64_t)val);
-                memcpy(regSpace + 4 * floatReg, &result64, width);
+                memcpy(regSpace + 4 * floatReg, &result64, sizeof(result64));
                 break;
               case QuadWidth:
                 panic("Quad width FP not implemented.");
@@ -275,11 +276,11 @@ namespace SparcISA
             {
               case SingleWidth:
                 result32 = gtoh((uint32_t)val);
-                memcpy(regSpace + 4 * floatReg, &result32, width);
+                memcpy(regSpace + 4 * floatReg, &result32, sizeof(result32));
                 break;
               case DoubleWidth:
                 result64 = gtoh((uint64_t)val);
-                memcpy(regSpace + 4 * floatReg, &result64, width);
+                memcpy(regSpace + 4 * floatReg, &result64, sizeof(result64));
                 break;
               case QuadWidth:
                 panic("Quad width FP not implemented.");