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-rw-r--r--src/arch/sparc/tlb.hh28
1 files changed, 28 insertions, 0 deletions
diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh
index 35ff08b43..0d42e2c97 100644
--- a/src/arch/sparc/tlb.hh
+++ b/src/arch/sparc/tlb.hh
@@ -31,5 +31,33 @@
#ifndef __ARCH_SPARC_TLB_HH__
#define __ARCH_SPARC_TLB_HH__
+#include "sim/faults.hh"
+
+class ThreadContext;
+
+namespace SparcISA
+{
+ class TLB
+ {
+ };
+
+ class ITB : public TLB
+ {
+ public:
+ Fault translate(RequestPtr &req, ThreadContext *tc) const
+ {
+ return NoFault;
+ }
+ };
+
+ class DTB : public TLB
+ {
+ public:
+ Fault translate(RequestPtr &req, ThreadContext *tc, bool write) const
+ {
+ return NoFault;
+ }
+ };
+}
#endif // __ARCH_SPARC_TLB_HH__