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-rw-r--r--src/arch/sparc/tlb.hh11
1 files changed, 6 insertions, 5 deletions
diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh
index 7437ec3e6..e5e6753be 100644
--- a/src/arch/sparc/tlb.hh
+++ b/src/arch/sparc/tlb.hh
@@ -146,8 +146,8 @@ class TLB : public BaseTLB
void writeTagAccess(Addr va, int context);
- Fault translateInst(RequestPtr req, ThreadContext *tc);
- Fault translateData(RequestPtr req, ThreadContext *tc, bool write);
+ Fault translateInst(const RequestPtr &req, ThreadContext *tc);
+ Fault translateData(const RequestPtr &req, ThreadContext *tc, bool write);
public:
typedef SparcTLBParams Params;
@@ -164,12 +164,13 @@ class TLB : public BaseTLB
void dumpAll();
Fault translateAtomic(
- RequestPtr req, ThreadContext *tc, Mode mode) override;
+ const RequestPtr &req, ThreadContext *tc, Mode mode) override;
void translateTiming(
- RequestPtr req, ThreadContext *tc,
+ const RequestPtr &req, ThreadContext *tc,
Translation *translation, Mode mode) override;
Fault finalizePhysical(
- RequestPtr req, ThreadContext *tc, Mode mode) const override;
+ const RequestPtr &req,
+ ThreadContext *tc, Mode mode) const override;
Cycles doMmuRegRead(ThreadContext *tc, Packet *pkt);
Cycles doMmuRegWrite(ThreadContext *tc, Packet *pkt);
void GetTsbPtr(ThreadContext *tc, Addr addr, int ctx, Addr *ptrs);