diff options
Diffstat (limited to 'src/arch/sparc/tlb.hh')
| -rw-r--r-- | src/arch/sparc/tlb.hh | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh index 0fdba6baf..136103f44 100644 --- a/src/arch/sparc/tlb.hh +++ b/src/arch/sparc/tlb.hh @@ -31,6 +31,7 @@ #ifndef __ARCH_SPARC_TLB_HH__ #define __ARCH_SPARC_TLB_HH__ +#include "base/misc.hh" #include "mem/request.hh" #include "sim/faults.hh" #include "sim/sim_object.hh" @@ -39,6 +40,9 @@ class ThreadContext; namespace SparcISA { + const int PAddrImplBits = 40; + const Addr PAddrImplMask = (ULL(1) << PAddrImplBits) - 1; + class TLB : public SimObject { public: @@ -56,6 +60,9 @@ namespace SparcISA Fault translate(RequestPtr &req, ThreadContext *tc) const { + //For now, always assume the address is already physical. + //Also assume that there are 40 bits of physical address space. + req->setPaddr(req->getVaddr() & PAddrImplMask); return NoFault; } }; @@ -69,6 +76,9 @@ namespace SparcISA Fault translate(RequestPtr &req, ThreadContext *tc, bool write) const { + //For now, always assume the address is already physical. + //Also assume that there are 40 bits of physical address space. + req->setPaddr(req->getVaddr() & ((1ULL << 40) - 1)); return NoFault; } }; |