diff options
Diffstat (limited to 'src/arch/sparc')
| -rw-r--r-- | src/arch/sparc/tlb.cc | 2 | ||||
| -rw-r--r-- | src/arch/sparc/tlb.hh | 9 |
2 files changed, 8 insertions, 3 deletions
diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc index 740da37ab..22df44908 100644 --- a/src/arch/sparc/tlb.cc +++ b/src/arch/sparc/tlb.cc @@ -46,7 +46,7 @@ namespace SparcISA { TLB::TLB(const Params *p) - : SimObject(p), size(p->size), usedEntries(0), lastReplaced(0), + : BaseTLB(p), size(p->size), usedEntries(0), lastReplaced(0), cacheValid(false) { // To make this work you'll have to change the hypervisor and OS diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh index b38ee15dc..2f7d08320 100644 --- a/src/arch/sparc/tlb.hh +++ b/src/arch/sparc/tlb.hh @@ -39,7 +39,7 @@ #include "params/SparcDTB.hh" #include "params/SparcITB.hh" #include "sim/faults.hh" -#include "sim/sim_object.hh" +#include "sim/tlb.hh" class ThreadContext; class Packet; @@ -47,7 +47,7 @@ class Packet; namespace SparcISA { -class TLB : public SimObject +class TLB : public BaseTLB { #if !FULL_SYSTEM //These faults need to be able to populate the tlb in SE mode. @@ -152,6 +152,11 @@ class TLB : public SimObject typedef SparcTLBParams Params; TLB(const Params *p); + void demapPage(Addr vaddr, uint64_t asn) + { + panic("demapPage(Addr) is not implemented.\n"); + } + void dumpAll(); // Checkpointing |