diff options
Diffstat (limited to 'src/arch/sparc')
| -rw-r--r-- | src/arch/sparc/faults.cc | 2 | ||||
| -rw-r--r-- | src/arch/sparc/isa/formats/mem/util.isa | 9 | ||||
| -rw-r--r-- | src/arch/sparc/tlb.cc | 8 |
3 files changed, 10 insertions, 9 deletions
diff --git a/src/arch/sparc/faults.cc b/src/arch/sparc/faults.cc index e201cef95..9c189d164 100644 --- a/src/arch/sparc/faults.cc +++ b/src/arch/sparc/faults.cc @@ -546,7 +546,7 @@ void SparcFaultBase::invoke(ThreadContext * tc) doNormalFault(tc, trapType(), true); getHyperVector(tc, PC, NPC, 2); } else if (level == Hyperprivileged || - level == Privileged && trapType() >= 384) { + (level == Privileged && trapType() >= 384)) { doNormalFault(tc, trapType(), true); getHyperVector(tc, PC, NPC, trapType()); } else { diff --git a/src/arch/sparc/isa/formats/mem/util.isa b/src/arch/sparc/isa/formats/mem/util.isa index 38cde9a50..f2a2327ee 100644 --- a/src/arch/sparc/isa/formats/mem/util.isa +++ b/src/arch/sparc/isa/formats/mem/util.isa @@ -314,10 +314,11 @@ let {{ # are split into ones that are available in priv and hpriv, and # those that are only available in hpriv AlternateASIPrivFaultCheck = ''' - if(!bits(Pstate,2,2) && !bits(Hpstate,2,2) && !AsiIsUnPriv((ASI)EXT_ASI) || - !bits(Hpstate,2,2) && AsiIsHPriv((ASI)EXT_ASI)) - fault = new PrivilegedAction; - else if(AsiIsAsIfUser((ASI)EXT_ASI) && !bits(Pstate,2,2)) + if ((!bits(Pstate,2,2) && !bits(Hpstate,2,2) && + !AsiIsUnPriv((ASI)EXT_ASI)) || + (!bits(Hpstate,2,2) && AsiIsHPriv((ASI)EXT_ASI))) + fault = new PrivilegedAction; + else if (AsiIsAsIfUser((ASI)EXT_ASI) && !bits(Pstate,2,2)) fault = new PrivilegedAction; ''' diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc index defa33c51..125ceba69 100644 --- a/src/arch/sparc/tlb.cc +++ b/src/arch/sparc/tlb.cc @@ -562,7 +562,7 @@ DTB::translate(RequestPtr &req, ThreadContext *tc, bool write) asi = (ASI)req->getAsi(); bool implicit = false; bool hpriv = bits(tlbdata,0,0); - bool unaligned = (vaddr & size-1); + bool unaligned = vaddr & (size - 1); DPRINTF(TLB, "TLB: DTB Request to translate va=%#x size=%d asi=%#x\n", vaddr, size, asi); @@ -801,8 +801,8 @@ handleIntRegAccess: return new PrivilegedAction; } - if (asi == ASI_SWVR_UDB_INTR_W && !write || - asi == ASI_SWVR_UDB_INTR_R && write) { + if ((asi == ASI_SWVR_UDB_INTR_W && !write) || + (asi == ASI_SWVR_UDB_INTR_R && write)) { writeSfsr(vaddr, write, Primary, true, IllegalAsi, asi); return new DataAccessException; } @@ -822,7 +822,7 @@ handleQueueRegAccess: writeSfsr(vaddr, write, Primary, true, IllegalAsi, asi); return new PrivilegedAction; } - if (!hpriv && vaddr & 0xF || vaddr > 0x3f8 || vaddr < 0x3c0) { + if ((!hpriv && vaddr & 0xF) || vaddr > 0x3f8 || vaddr < 0x3c0) { writeSfsr(vaddr, write, Primary, true, IllegalAsi, asi); return new DataAccessException; } |