diff options
Diffstat (limited to 'src/arch/sparc')
| -rw-r--r-- | src/arch/sparc/insts/SConscript | 1 | ||||
| -rw-r--r-- | src/arch/sparc/insts/micro.cc | 44 | ||||
| -rw-r--r-- | src/arch/sparc/insts/micro.hh | 126 | ||||
| -rw-r--r-- | src/arch/sparc/isa/formats/formats.isa | 3 | ||||
| -rw-r--r-- | src/arch/sparc/isa/formats/micro.isa | 130 | ||||
| -rw-r--r-- | src/arch/sparc/isa/includes.isa | 1 |
6 files changed, 172 insertions, 133 deletions
diff --git a/src/arch/sparc/insts/SConscript b/src/arch/sparc/insts/SConscript index 24b74858e..8848566a8 100644 --- a/src/arch/sparc/insts/SConscript +++ b/src/arch/sparc/insts/SConscript @@ -33,6 +33,7 @@ Import('*') if env['TARGET_ISA'] == 'sparc': Source('branch.cc') + Source('micro.cc') Source('priv.cc') Source('static_inst.cc') Source('trap.cc') diff --git a/src/arch/sparc/insts/micro.cc b/src/arch/sparc/insts/micro.cc new file mode 100644 index 000000000..64153247e --- /dev/null +++ b/src/arch/sparc/insts/micro.cc @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2006-2007 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#include "arch/sparc/insts/micro.hh" + +namespace SparcISA +{ + +std::string +SparcMacroInst::generateDisassembly(Addr pc, const SymbolTable *symtab) const +{ + std::stringstream response; + printMnemonic(response, mnemonic); + return response.str(); +} + +} diff --git a/src/arch/sparc/insts/micro.hh b/src/arch/sparc/insts/micro.hh new file mode 100644 index 000000000..d8c3adc33 --- /dev/null +++ b/src/arch/sparc/insts/micro.hh @@ -0,0 +1,126 @@ +/* + * Copyright (c) 2006-2007 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#ifndef __ARCH_SPARC_INSTS_MICRO_HH__ +#define __ARCH_SPARC_INSTS_MICRO_HH__ + +#include "arch/sparc/insts/static_inst.hh" + +namespace SparcISA +{ + +class SparcMacroInst : public SparcStaticInst +{ + protected: + const uint32_t numMicroops; + + // Constructor. + SparcMacroInst(const char *mnem, ExtMachInst _machInst, + OpClass __opClass, uint32_t _numMicroops) : + SparcStaticInst(mnem, _machInst, __opClass), + numMicroops(_numMicroops) + { + assert(numMicroops); + microops = new StaticInstPtr[numMicroops]; + flags[IsMacroop] = true; + } + + ~SparcMacroInst() + { + delete [] microops; + } + + std::string generateDisassembly( + Addr pc, const SymbolTable *symtab) const override; + + StaticInstPtr *microops; + + StaticInstPtr + fetchMicroop(MicroPC upc) const override + { + assert(upc < numMicroops); + return microops[upc]; + } + + Fault + execute(ExecContext *, Trace::InstRecord *) const override + { + panic("Tried to execute a macroop directly!\n"); + } + + Fault + initiateAcc(ExecContext *, Trace::InstRecord *) const override + { + panic("Tried to execute a macroop directly!\n"); + } + + Fault + completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const override + { + panic("Tried to execute a macroop directly!\n"); + } +}; + +class SparcMicroInst : public SparcStaticInst +{ + protected: + // Constructor. + SparcMicroInst(const char *mnem, ExtMachInst _machInst, + OpClass __opClass) : + SparcStaticInst(mnem, _machInst, __opClass) + { + flags[IsMicroop] = true; + } + + void + advancePC(SparcISA::PCState &pcState) const override + { + if (flags[IsLastMicroop]) + pcState.uEnd(); + else + pcState.uAdvance(); + } +}; + +class SparcDelayedMicroInst : public SparcMicroInst +{ + protected: + // Constructor. + SparcDelayedMicroInst(const char *mnem, ExtMachInst _machInst, + OpClass __opClass) : + SparcMicroInst(mnem, _machInst, __opClass) + { + flags[IsDelayedCommit] = true; + } +}; + +} + +#endif // __ARCH_SPARC_INSTS_MICRO_HH__ diff --git a/src/arch/sparc/isa/formats/formats.isa b/src/arch/sparc/isa/formats/formats.isa index f19e16547..99ff99af2 100644 --- a/src/arch/sparc/isa/formats/formats.isa +++ b/src/arch/sparc/isa/formats/formats.isa @@ -30,9 +30,6 @@ // Templates from this format are used later ##include "basic.isa" -// Include base classes for microcoding instructions -##include "micro.isa" - // Include the noop format ##include "nop.isa" diff --git a/src/arch/sparc/isa/formats/micro.isa b/src/arch/sparc/isa/formats/micro.isa deleted file mode 100644 index f9c4ebd6c..000000000 --- a/src/arch/sparc/isa/formats/micro.isa +++ /dev/null @@ -1,130 +0,0 @@ -// Copyright (c) 2006-2007 The Regents of The University of Michigan -// All rights reserved. -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions are -// met: redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer; -// redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the distribution; -// neither the name of the copyright holders nor the names of its -// contributors may be used to endorse or promote products derived from -// this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black - -output header {{ - - class SparcMacroInst : public SparcStaticInst - { - protected: - const uint32_t numMicroops; - - // Constructor. - SparcMacroInst(const char *mnem, ExtMachInst _machInst, - OpClass __opClass, uint32_t _numMicroops) - : SparcStaticInst(mnem, _machInst, __opClass), - numMicroops(_numMicroops) - { - assert(numMicroops); - microops = new StaticInstPtr[numMicroops]; - flags[IsMacroop] = true; - } - - ~SparcMacroInst() - { - delete [] microops; - } - - std::string generateDisassembly(Addr pc, - const SymbolTable *symtab) const; - - StaticInstPtr * microops; - - StaticInstPtr - fetchMicroop(MicroPC upc) const - { - assert(upc < numMicroops); - return microops[upc]; - } - - Fault - execute(ExecContext *, Trace::InstRecord *) const - { - panic("Tried to execute a macroop directly!\n"); - } - - Fault - initiateAcc(ExecContext *, Trace::InstRecord *) const - { - panic("Tried to execute a macroop directly!\n"); - } - - Fault - completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const - { - panic("Tried to execute a macroop directly!\n"); - } - }; - - class SparcMicroInst : public SparcStaticInst - { - protected: - // Constructor. - SparcMicroInst(const char *mnem, - ExtMachInst _machInst, OpClass __opClass) - : SparcStaticInst(mnem, _machInst, __opClass) - { - flags[IsMicroop] = true; - } - - void - advancePC(SparcISA::PCState &pcState) const - { - if (flags[IsLastMicroop]) - pcState.uEnd(); - else - pcState.uAdvance(); - } - }; - - class SparcDelayedMicroInst : public SparcMicroInst - { - protected: - // Constructor. - SparcDelayedMicroInst(const char *mnem, - ExtMachInst _machInst, OpClass __opClass) - : SparcMicroInst(mnem, _machInst, __opClass) - { - flags[IsDelayedCommit] = true; - } - }; -}}; - -output decoder {{ - - std::string - SparcMacroInst::generateDisassembly(Addr pc, - const SymbolTable *symtab) const - { - std::stringstream response; - - printMnemonic(response, mnemonic); - - return response.str(); - } - -}}; diff --git a/src/arch/sparc/isa/includes.isa b/src/arch/sparc/isa/includes.isa index 4a94d2f6d..a33a44ed9 100644 --- a/src/arch/sparc/isa/includes.isa +++ b/src/arch/sparc/isa/includes.isa @@ -40,6 +40,7 @@ output header {{ #include "arch/sparc/faults.hh" #include "arch/sparc/insts/branch.hh" +#include "arch/sparc/insts/micro.hh" #include "arch/sparc/insts/nop.hh" #include "arch/sparc/insts/priv.hh" #include "arch/sparc/insts/static_inst.hh" |