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-rw-r--r--src/arch/sparc/SparcTLB.py6
-rw-r--r--src/arch/sparc/isa_traits.hh12
-rw-r--r--src/arch/sparc/process.cc10
-rw-r--r--src/arch/sparc/system.cc104
-rw-r--r--src/arch/sparc/system.hh24
-rw-r--r--src/arch/sparc/tlb.cc47
6 files changed, 31 insertions, 172 deletions
diff --git a/src/arch/sparc/SparcTLB.py b/src/arch/sparc/SparcTLB.py
index 30e5ebb08..2d0257cd7 100644
--- a/src/arch/sparc/SparcTLB.py
+++ b/src/arch/sparc/SparcTLB.py
@@ -35,8 +35,14 @@ class SparcTLB(SimObject):
class SparcDTB(SparcTLB):
type = 'SparcDTB'
+ cxx_namespace = 'SparcISA'
+ cxx_class = 'DTB'
+
size = 64
class SparcITB(SparcTLB):
type = 'SparcITB'
+ cxx_namespace = 'SparcISA'
+ cxx_class = 'ITB'
+
size = 64
diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index 8b3ec36a6..0edbdec4b 100644
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -69,14 +69,12 @@ namespace SparcISA
const int ReturnAddressReg = 31; // post call, precall is 15
const int ReturnValueReg = 8; // Post return, 24 is pre-return.
const int FramePointerReg = 30;
- const int ArgumentReg0 = 8;
- const int ArgumentReg1 = 9;
- const int ArgumentReg2 = 10;
- const int ArgumentReg3 = 11;
- const int ArgumentReg4 = 12;
- const int ArgumentReg5 = 13;
+
+ const int ArgumentReg[] = {8, 9, 10, 11, 12, 13};
+ const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
+
// Some OS syscall use a second register (o1) to return a second value
- const int SyscallPseudoReturnReg = ArgumentReg1;
+ const int SyscallPseudoReturnReg = ArgumentReg[1];
//XXX These numbers are bogus
const int MaxInstSrcRegs = 8;
diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc
index 0776694ec..bc950301a 100644
--- a/src/arch/sparc/process.cc
+++ b/src/arch/sparc/process.cc
@@ -399,8 +399,9 @@ Sparc64LiveProcess::argsInit(int intSize, int pageSize)
initVirtMem->writeBlob(spillStart, (uint8_t*)spillHandler64, spillSize);
//Set up the thread context to start running the process
- threadContexts[0]->setIntReg(ArgumentReg0, argc);
- threadContexts[0]->setIntReg(ArgumentReg1, argv_array_base);
+ assert(NumArgumentRegs >= 2);
+ threadContexts[0]->setIntReg(ArgumentReg[0], argc);
+ threadContexts[0]->setIntReg(ArgumentReg[1], argv_array_base);
threadContexts[0]->setIntReg(StackPointerReg, stack_min - StackBias);
Addr prog_entry = objFile->entryPoint();
@@ -627,8 +628,9 @@ Sparc32LiveProcess::argsInit(int intSize, int pageSize)
initVirtMem->writeBlob(spillStart, (uint8_t*)spillHandler32, spillSize);
//Set up the thread context to start running the process
- //threadContexts[0]->setIntReg(ArgumentReg0, argc);
- //threadContexts[0]->setIntReg(ArgumentReg1, argv_array_base);
+ //assert(NumArgumentRegs >= 2);
+ //threadContexts[0]->setIntReg(ArgumentReg[0], argc);
+ //threadContexts[0]->setIntReg(ArgumentReg[1], argv_array_base);
threadContexts[0]->setIntReg(StackPointerReg, stack_min);
uint32_t prog_entry = objFile->entryPoint();
diff --git a/src/arch/sparc/system.cc b/src/arch/sparc/system.cc
index 2600213fd..1ee207844 100644
--- a/src/arch/sparc/system.cc
+++ b/src/arch/sparc/system.cc
@@ -35,8 +35,8 @@
#include "base/loader/symtab.hh"
#include "base/trace.hh"
#include "mem/physical.hh"
+#include "params/SparcSystem.hh"
#include "sim/byteswap.hh"
-#include "sim/builder.hh"
using namespace BigEndianGuest;
@@ -216,104 +216,8 @@ SparcSystem::unserialize(Checkpoint *cp, const std::string &section)
partitionDescSymtab->unserialize("partition_desc_symtab", cp, section);
}
-
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(SparcSystem)
-
- SimObjectParam<PhysicalMemory *> physmem;
- SimObjectParam<PhysicalMemory *> rom;
- SimObjectParam<PhysicalMemory *> nvram;
- SimObjectParam<PhysicalMemory *> hypervisor_desc;
- SimObjectParam<PhysicalMemory *> partition_desc;
- SimpleEnumParam<System::MemoryMode> mem_mode;
-
- Param<Addr> reset_addr;
- Param<Addr> hypervisor_addr;
- Param<Addr> openboot_addr;
- Param<Addr> nvram_addr;
- Param<Addr> hypervisor_desc_addr;
- Param<Addr> partition_desc_addr;
-
- Param<std::string> kernel;
- Param<std::string> reset_bin;
- Param<std::string> hypervisor_bin;
- Param<std::string> openboot_bin;
- Param<std::string> nvram_bin;
- Param<std::string> hypervisor_desc_bin;
- Param<std::string> partition_desc_bin;
-
- Param<Tick> boot_cpu_frequency;
- Param<std::string> boot_osflags;
- Param<std::string> readfile;
- Param<unsigned int> init_param;
-
-END_DECLARE_SIM_OBJECT_PARAMS(SparcSystem)
-
-BEGIN_INIT_SIM_OBJECT_PARAMS(SparcSystem)
-
- INIT_PARAM(physmem, "phsyical memory"),
- INIT_PARAM(rom, "ROM for boot code"),
- INIT_PARAM(nvram, "Non-volatile RAM for the nvram"),
- INIT_PARAM(hypervisor_desc, "ROM for the hypervisor description"),
- INIT_PARAM(partition_desc, "ROM for the partition description"),
- INIT_ENUM_PARAM(mem_mode, "Memory Mode, (1=atomic, 2=timing)",
- System::MemoryModeStrings),
-
- INIT_PARAM(reset_addr, "Address that reset should be loaded at"),
- INIT_PARAM(hypervisor_addr, "Address that hypervisor should be loaded at"),
- INIT_PARAM(openboot_addr, "Address that openboot should be loaded at"),
- INIT_PARAM(nvram_addr, "Address that nvram should be loaded at"),
- INIT_PARAM(hypervisor_desc_addr,
- "Address that hypervisor description should be loaded at"),
- INIT_PARAM(partition_desc_addr,
- "Address that partition description should be loaded at"),
-
- INIT_PARAM(kernel, "file that contains the kernel code"),
- INIT_PARAM(reset_bin, "file that contains the reset code"),
- INIT_PARAM(hypervisor_bin, "file that contains the hypervisor code"),
- INIT_PARAM(openboot_bin, "file that contains the openboot code"),
- INIT_PARAM(nvram_bin, "file that contains the nvram image"),
- INIT_PARAM(hypervisor_desc_bin,
- "file that contains the hypervisor description image"),
- INIT_PARAM(partition_desc_bin,
- "file that contains the partition description image"),
- INIT_PARAM(boot_cpu_frequency, "Frequency of the boot CPU"),
- INIT_PARAM_DFLT(boot_osflags, "flags to pass to the kernel during boot",
- "a"),
- INIT_PARAM_DFLT(readfile, "file to read startup script from", ""),
- INIT_PARAM_DFLT(init_param, "numerical value to pass into simulator", 0)
-
-END_INIT_SIM_OBJECT_PARAMS(SparcSystem)
-
-CREATE_SIM_OBJECT(SparcSystem)
+SparcSystem *
+SparcSystemParams::create()
{
- SparcSystem::Params *p = new SparcSystem::Params;
- p->name = getInstanceName();
- p->boot_cpu_frequency = boot_cpu_frequency;
- p->physmem = physmem;
- p->rom = rom;
- p->nvram = nvram;
- p->hypervisor_desc = hypervisor_desc;
- p->partition_desc = partition_desc;
- p->mem_mode = mem_mode;
- p->kernel_path = kernel;
- p->reset_addr = reset_addr;
- p->hypervisor_addr = hypervisor_addr;
- p->openboot_addr = openboot_addr;
- p->nvram_addr = nvram_addr;
- p->hypervisor_desc_addr = hypervisor_desc_addr;
- p->partition_desc_addr = partition_desc_addr;
- p->reset_bin = reset_bin;
- p->hypervisor_bin = hypervisor_bin;
- p->openboot_bin = openboot_bin;
- p->nvram_bin = nvram_bin;
- p->hypervisor_desc_bin = hypervisor_desc_bin;
- p->partition_desc_bin = partition_desc_bin;
- p->boot_osflags = boot_osflags;
- p->init_param = init_param;
- p->readfile = readfile;
- return new SparcSystem(p);
+ return new SparcSystem(this);
}
-
-REGISTER_SIM_OBJECT("SparcSystem", SparcSystem)
-
-
diff --git a/src/arch/sparc/system.hh b/src/arch/sparc/system.hh
index ac4d34279..086ce3fdb 100644
--- a/src/arch/sparc/system.hh
+++ b/src/arch/sparc/system.hh
@@ -37,35 +37,15 @@
#include "base/loader/symtab.hh"
#include "cpu/pc_event.hh"
#include "kern/system_events.hh"
+#include "params/SparcSystem.hh"
#include "sim/sim_object.hh"
#include "sim/system.hh"
class SparcSystem : public System
{
public:
- struct Params : public System::Params
- {
- PhysicalMemory *rom;
- PhysicalMemory *nvram;
- PhysicalMemory *hypervisor_desc;
- PhysicalMemory *partition_desc;
- Addr reset_addr;
- Addr hypervisor_addr;
- Addr openboot_addr;
- Addr nvram_addr;
- Addr hypervisor_desc_addr;
- Addr partition_desc_addr;
- std::string reset_bin;
- std::string hypervisor_bin;
- std::string openboot_bin;
- std::string nvram_bin;
- std::string hypervisor_desc_bin;
- std::string partition_desc_bin;
- std::string boot_osflags;
- };
-
+ typedef SparcSystemParams Params;
SparcSystem(Params *p);
-
~SparcSystem();
/**
diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc
index 68df19618..21d56b8c6 100644
--- a/src/arch/sparc/tlb.cc
+++ b/src/arch/sparc/tlb.cc
@@ -39,7 +39,8 @@
#include "cpu/base.hh"
#include "mem/packet_access.hh"
#include "mem/request.hh"
-#include "sim/builder.hh"
+#include "params/SparcDTB.hh"
+#include "params/SparcITB.hh"
#include "sim/system.hh"
/* @todo remove some of the magic constants. -- ali
@@ -1386,46 +1387,14 @@ TLB::unserialize(Checkpoint *cp, const std::string &section)
/* end namespace SparcISA */ }
-using namespace SparcISA;
-
-DEFINE_SIM_OBJECT_CLASS_NAME("SparcTLB", TLB)
-
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(ITB)
-
- Param<int> size;
-
-END_DECLARE_SIM_OBJECT_PARAMS(ITB)
-
-BEGIN_INIT_SIM_OBJECT_PARAMS(ITB)
-
- INIT_PARAM_DFLT(size, "TLB size", 48)
-
-END_INIT_SIM_OBJECT_PARAMS(ITB)
-
-
-CREATE_SIM_OBJECT(ITB)
+SparcISA::ITB *
+SparcITBParams::create()
{
- return new ITB(getInstanceName(), size);
+ return new SparcISA::ITB(name, size);
}
-REGISTER_SIM_OBJECT("SparcITB", ITB)
-
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(DTB)
-
- Param<int> size;
-
-END_DECLARE_SIM_OBJECT_PARAMS(DTB)
-
-BEGIN_INIT_SIM_OBJECT_PARAMS(DTB)
-
- INIT_PARAM_DFLT(size, "TLB size", 64)
-
-END_INIT_SIM_OBJECT_PARAMS(DTB)
-
-
-CREATE_SIM_OBJECT(DTB)
+SparcISA::DTB *
+SparcDTBParams::create()
{
- return new DTB(getInstanceName(), size);
+ return new SparcISA::DTB(name, size);
}
-
-REGISTER_SIM_OBJECT("SparcDTB", DTB)
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-06 19:54:28 +0000