diff options
Diffstat (limited to 'src/arch/x86/X86TLB.py')
| -rw-r--r-- | src/arch/x86/X86TLB.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/X86TLB.py b/src/arch/x86/X86TLB.py index 7f2fcd358..334d2a0cf 100644 --- a/src/arch/x86/X86TLB.py +++ b/src/arch/x86/X86TLB.py @@ -44,7 +44,7 @@ from MemObject import MemObject class X86PagetableWalker(MemObject): type = 'X86PagetableWalker' cxx_class = 'X86ISA::Walker' - port = Port("Port for the hardware table walker") + port = MasterPort("Port for the hardware table walker") system = Param.System(Parent.any, "system object") class X86TLB(BaseTLB): |