diff options
Diffstat (limited to 'src/arch/x86/bios')
-rw-r--r-- | src/arch/x86/bios/e820.cc | 16 | ||||
-rw-r--r-- | src/arch/x86/bios/e820.hh | 4 | ||||
-rw-r--r-- | src/arch/x86/bios/intelmp.cc | 58 | ||||
-rw-r--r-- | src/arch/x86/bios/intelmp.hh | 22 | ||||
-rw-r--r-- | src/arch/x86/bios/smbios.cc | 70 | ||||
-rw-r--r-- | src/arch/x86/bios/smbios.hh | 8 |
6 files changed, 89 insertions, 89 deletions
diff --git a/src/arch/x86/bios/e820.cc b/src/arch/x86/bios/e820.cc index 7564fcec7..c966916f5 100644 --- a/src/arch/x86/bios/e820.cc +++ b/src/arch/x86/bios/e820.cc @@ -39,21 +39,21 @@ #include "arch/x86/bios/e820.hh" #include "arch/x86/isa_traits.hh" -#include "mem/port.hh" +#include "mem/port_proxy.hh" #include "sim/byteswap.hh" using namespace std; using namespace X86ISA; template<class T> -void writeVal(T val, Port * port, Addr &addr) +void writeVal(T val, PortProxy& proxy, Addr &addr) { T guestVal = htog(val); - port->writeBlob(addr, (uint8_t *)&guestVal, sizeof(T)); + proxy.writeBlob(addr, (uint8_t *)&guestVal, sizeof(T)); addr += sizeof(T); } -void X86ISA::E820Table::writeTo(Port * port, Addr countAddr, Addr addr) +void X86ISA::E820Table::writeTo(PortProxy& proxy, Addr countAddr, Addr addr) { uint8_t e820Nr = entries.size(); @@ -63,12 +63,12 @@ void X86ISA::E820Table::writeTo(Port * port, Addr countAddr, Addr addr) uint8_t guestE820Nr = htog(e820Nr); - port->writeBlob(countAddr, (uint8_t *)&guestE820Nr, sizeof(guestE820Nr)); + proxy.writeBlob(countAddr, (uint8_t *)&guestE820Nr, sizeof(guestE820Nr)); for (int i = 0; i < e820Nr; i++) { - writeVal(entries[i]->addr, port, addr); - writeVal(entries[i]->size, port, addr); - writeVal(entries[i]->type, port, addr); + writeVal(entries[i]->addr, proxy, addr); + writeVal(entries[i]->size, proxy, addr); + writeVal(entries[i]->type, proxy, addr); } } diff --git a/src/arch/x86/bios/e820.hh b/src/arch/x86/bios/e820.hh index cb8d5946c..b61708050 100644 --- a/src/arch/x86/bios/e820.hh +++ b/src/arch/x86/bios/e820.hh @@ -47,7 +47,7 @@ #include "params/X86E820Table.hh" #include "sim/sim_object.hh" -class Port; +class PortProxy; namespace X86ISA { @@ -75,7 +75,7 @@ namespace X86ISA E820Table(Params *p) : SimObject(p), entries(p->entries) {} - void writeTo(Port * port, Addr countAddr, Addr addr); + void writeTo(PortProxy& proxy, Addr countAddr, Addr addr); }; }; diff --git a/src/arch/x86/bios/intelmp.cc b/src/arch/x86/bios/intelmp.cc index 4c9c61adb..645c51b36 100644 --- a/src/arch/x86/bios/intelmp.cc +++ b/src/arch/x86/bios/intelmp.cc @@ -70,10 +70,10 @@ const char X86ISA::IntelMP::FloatingPointer::signature[] = "_MP_"; template<class T> uint8_t -writeOutField(PortProxy* proxy, Addr addr, T val) +writeOutField(PortProxy& proxy, Addr addr, T val) { uint64_t guestVal = X86ISA::htog(val); - proxy->writeBlob(addr, (uint8_t *)(&guestVal), sizeof(T)); + proxy.writeBlob(addr, (uint8_t *)(&guestVal), sizeof(T)); uint8_t checkSum = 0; while(guestVal) { @@ -84,7 +84,7 @@ writeOutField(PortProxy* proxy, Addr addr, T val) } uint8_t -writeOutString(PortProxy* proxy, Addr addr, string str, int length) +writeOutString(PortProxy& proxy, Addr addr, string str, int length) { char cleanedString[length + 1]; cleanedString[length] = 0; @@ -97,7 +97,7 @@ writeOutString(PortProxy* proxy, Addr addr, string str, int length) memcpy(cleanedString, str.c_str(), str.length()); memset(cleanedString + str.length(), 0, length - str.length()); } - proxy->writeBlob(addr, (uint8_t *)(&cleanedString), length); + proxy.writeBlob(addr, (uint8_t *)(&cleanedString), length); uint8_t checkSum = 0; for (int i = 0; i < length; i++) @@ -107,7 +107,7 @@ writeOutString(PortProxy* proxy, Addr addr, string str, int length) } Addr -X86ISA::IntelMP::FloatingPointer::writeOut(PortProxy* proxy, Addr addr) +X86ISA::IntelMP::FloatingPointer::writeOut(PortProxy& proxy, Addr addr) { // Make sure that either a config table is present or a default // configuration was found but not both. @@ -120,7 +120,7 @@ X86ISA::IntelMP::FloatingPointer::writeOut(PortProxy* proxy, Addr addr) uint8_t checkSum = 0; - proxy->writeBlob(addr, (uint8_t *)signature, 4); + proxy.writeBlob(addr, (uint8_t *)signature, 4); for (int i = 0; i < 4; i++) checkSum += signature[i]; @@ -128,20 +128,20 @@ X86ISA::IntelMP::FloatingPointer::writeOut(PortProxy* proxy, Addr addr) // The length of the structure in paragraphs, aka 16 byte chunks. uint8_t length = 1; - proxy->writeBlob(addr + 8, &length, 1); + proxy.writeBlob(addr + 8, &length, 1); checkSum += length; - proxy->writeBlob(addr + 9, &specRev, 1); + proxy.writeBlob(addr + 9, &specRev, 1); checkSum += specRev; - proxy->writeBlob(addr + 11, &defaultConfig, 1); + proxy.writeBlob(addr + 11, &defaultConfig, 1); checkSum += defaultConfig; uint32_t features2_5 = imcrPresent ? (1 << 7) : 0; checkSum += writeOutField(proxy, addr + 12, features2_5); checkSum = -checkSum; - proxy->writeBlob(addr + 10, &checkSum, 1); + proxy.writeBlob(addr + 10, &checkSum, 1); return 16; } @@ -158,10 +158,10 @@ X86IntelMPFloatingPointerParams::create() } Addr -X86ISA::IntelMP::BaseConfigEntry::writeOut(PortProxy* proxy, +X86ISA::IntelMP::BaseConfigEntry::writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum) { - proxy->writeBlob(addr, &type, 1); + proxy.writeBlob(addr, &type, 1); checkSum += type; return 1; } @@ -171,12 +171,12 @@ X86ISA::IntelMP::BaseConfigEntry::BaseConfigEntry(Params * p, uint8_t _type) : {} Addr -X86ISA::IntelMP::ExtConfigEntry::writeOut(PortProxy* proxy, +X86ISA::IntelMP::ExtConfigEntry::writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum) { - proxy->writeBlob(addr, &type, 1); + proxy.writeBlob(addr, &type, 1); checkSum += type; - proxy->writeBlob(addr + 1, &length, 1); + proxy.writeBlob(addr + 1, &length, 1); checkSum += length; return 1; } @@ -189,17 +189,17 @@ X86ISA::IntelMP::ExtConfigEntry::ExtConfigEntry(Params * p, const char X86ISA::IntelMP::ConfigTable::signature[] = "PCMP"; Addr -X86ISA::IntelMP::ConfigTable::writeOut(PortProxy* proxy, Addr addr) +X86ISA::IntelMP::ConfigTable::writeOut(PortProxy& proxy, Addr addr) { uint8_t checkSum = 0; - proxy->writeBlob(addr, (uint8_t *)signature, 4); + proxy.writeBlob(addr, (uint8_t *)signature, 4); for (int i = 0; i < 4; i++) checkSum += signature[i]; // Base table length goes here but will be calculated later. - proxy->writeBlob(addr + 6, (uint8_t *)(&specRev), 1); + proxy.writeBlob(addr + 6, (uint8_t *)(&specRev), 1); checkSum += specRev; // The checksum goes here but is still being calculated. @@ -213,7 +213,7 @@ X86ISA::IntelMP::ConfigTable::writeOut(PortProxy* proxy, Addr addr) checkSum += writeOutField(proxy, addr + 36, localApic); uint8_t reserved = 0; - proxy->writeBlob(addr + 43, &reserved, 1); + proxy.writeBlob(addr + 43, &reserved, 1); checkSum += reserved; vector<BaseConfigEntry *>::iterator baseEnt; @@ -261,7 +261,7 @@ X86IntelMPConfigTableParams::create() Addr X86ISA::IntelMP::Processor::writeOut( - PortProxy* proxy, Addr addr, uint8_t &checkSum) + PortProxy& proxy, Addr addr, uint8_t &checkSum) { BaseConfigEntry::writeOut(proxy, addr, checkSum); checkSum += writeOutField(proxy, addr + 1, localApicID); @@ -271,8 +271,8 @@ X86ISA::IntelMP::Processor::writeOut( checkSum += writeOutField(proxy, addr + 8, featureFlags); uint32_t reserved = 0; - proxy->writeBlob(addr + 12, (uint8_t *)(&reserved), 4); - proxy->writeBlob(addr + 16, (uint8_t *)(&reserved), 4); + proxy.writeBlob(addr + 12, (uint8_t *)(&reserved), 4); + proxy.writeBlob(addr + 16, (uint8_t *)(&reserved), 4); return 20; } @@ -298,7 +298,7 @@ X86IntelMPProcessorParams::create() Addr X86ISA::IntelMP::Bus::writeOut( - PortProxy* proxy, Addr addr, uint8_t &checkSum) + PortProxy& proxy, Addr addr, uint8_t &checkSum) { BaseConfigEntry::writeOut(proxy, addr, checkSum); checkSum += writeOutField(proxy, addr + 1, busID); @@ -318,7 +318,7 @@ X86IntelMPBusParams::create() Addr X86ISA::IntelMP::IOAPIC::writeOut( - PortProxy* proxy, Addr addr, uint8_t &checkSum) + PortProxy& proxy, Addr addr, uint8_t &checkSum) { BaseConfigEntry::writeOut(proxy, addr, checkSum); checkSum += writeOutField(proxy, addr + 1, id); @@ -343,7 +343,7 @@ X86IntelMPIOAPICParams::create() Addr X86ISA::IntelMP::IntAssignment::writeOut( - PortProxy* proxy, Addr addr, uint8_t &checkSum) + PortProxy& proxy, Addr addr, uint8_t &checkSum) { BaseConfigEntry::writeOut(proxy, addr, checkSum); checkSum += writeOutField(proxy, addr + 1, interruptType); @@ -381,7 +381,7 @@ X86IntelMPLocalIntAssignmentParams::create() Addr X86ISA::IntelMP::AddrSpaceMapping::writeOut( - PortProxy* proxy, Addr addr, uint8_t &checkSum) + PortProxy& proxy, Addr addr, uint8_t &checkSum) { ExtConfigEntry::writeOut(proxy, addr, checkSum); checkSum += writeOutField(proxy, addr + 2, busID); @@ -405,7 +405,7 @@ X86IntelMPAddrSpaceMappingParams::create() Addr X86ISA::IntelMP::BusHierarchy::writeOut( - PortProxy* proxy, Addr addr, uint8_t &checkSum) + PortProxy& proxy, Addr addr, uint8_t &checkSum) { ExtConfigEntry::writeOut(proxy, addr, checkSum); checkSum += writeOutField(proxy, addr + 2, busID); @@ -413,7 +413,7 @@ X86ISA::IntelMP::BusHierarchy::writeOut( checkSum += writeOutField(proxy, addr + 4, parentBus); uint32_t reserved = 0; - proxy->writeBlob(addr + 5, (uint8_t *)(&reserved), 3); + proxy.writeBlob(addr + 5, (uint8_t *)(&reserved), 3); return length; } @@ -434,7 +434,7 @@ X86IntelMPBusHierarchyParams::create() Addr X86ISA::IntelMP::CompatAddrSpaceMod::writeOut( - PortProxy* proxy, Addr addr, uint8_t &checkSum) + PortProxy& proxy, Addr addr, uint8_t &checkSum) { ExtConfigEntry::writeOut(proxy, addr, checkSum); checkSum += writeOutField(proxy, addr + 2, busID); diff --git a/src/arch/x86/bios/intelmp.hh b/src/arch/x86/bios/intelmp.hh index 4b730ad4b..909f8ad79 100644 --- a/src/arch/x86/bios/intelmp.hh +++ b/src/arch/x86/bios/intelmp.hh @@ -93,7 +93,7 @@ class FloatingPointer : public SimObject public: - Addr writeOut(PortProxy* proxy, Addr addr); + Addr writeOut(PortProxy& proxy, Addr addr); Addr getTableAddr() { @@ -117,7 +117,7 @@ class BaseConfigEntry : public SimObject public: - virtual Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + virtual Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); BaseConfigEntry(Params * p, uint8_t _type); }; @@ -132,7 +132,7 @@ class ExtConfigEntry : public SimObject public: - virtual Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + virtual Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); ExtConfigEntry(Params * p, uint8_t _type, uint8_t _length); }; @@ -155,7 +155,7 @@ class ConfigTable : public SimObject std::vector<ExtConfigEntry *> extEntries; public: - Addr writeOut(PortProxy* proxy, Addr addr); + Addr writeOut(PortProxy& proxy, Addr addr); ConfigTable(Params * p); }; @@ -172,7 +172,7 @@ class Processor : public BaseConfigEntry uint32_t featureFlags; public: - Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); Processor(Params * p); }; @@ -186,7 +186,7 @@ class Bus : public BaseConfigEntry std::string busType; public: - Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); Bus(Params * p); }; @@ -202,7 +202,7 @@ class IOAPIC : public BaseConfigEntry uint32_t address; public: - Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); IOAPIC(Params * p); }; @@ -221,7 +221,7 @@ class IntAssignment : public BaseConfigEntry uint8_t destApicIntIn; public: - Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); IntAssignment(X86IntelMPBaseConfigEntryParams * p, Enums::X86IntelMPInterruptType _interruptType, @@ -269,7 +269,7 @@ class AddrSpaceMapping : public ExtConfigEntry uint64_t addrLength; public: - Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); AddrSpaceMapping(Params * p); }; @@ -284,7 +284,7 @@ class BusHierarchy : public ExtConfigEntry uint8_t parentBus; public: - Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); BusHierarchy(Params * p); }; @@ -299,7 +299,7 @@ class CompatAddrSpaceMod : public ExtConfigEntry uint32_t rangeList; public: - Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); CompatAddrSpaceMod(Params * p); }; diff --git a/src/arch/x86/bios/smbios.cc b/src/arch/x86/bios/smbios.cc index a85ece1ec..9072664bf 100644 --- a/src/arch/x86/bios/smbios.cc +++ b/src/arch/x86/bios/smbios.cc @@ -74,15 +74,15 @@ composeBitVector(T vec) } uint16_t -X86ISA::SMBios::SMBiosStructure::writeOut(PortProxy* proxy, Addr addr) +X86ISA::SMBios::SMBiosStructure::writeOut(PortProxy& proxy, Addr addr) { - proxy->writeBlob(addr, (uint8_t *)(&type), 1); + proxy.writeBlob(addr, (uint8_t *)(&type), 1); uint8_t length = getLength(); - proxy->writeBlob(addr + 1, (uint8_t *)(&length), 1); + proxy.writeBlob(addr + 1, (uint8_t *)(&length), 1); uint16_t handleGuest = X86ISA::htog(handle); - proxy->writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2); + proxy.writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2); return length + getStringLength(); } @@ -93,7 +93,7 @@ X86ISA::SMBios::SMBiosStructure::SMBiosStructure(Params * p, uint8_t _type) : void X86ISA::SMBios::SMBiosStructure::writeOutStrings( - PortProxy* proxy, Addr addr) + PortProxy& proxy, Addr addr) { std::vector<std::string>::iterator it; Addr offset = 0; @@ -103,16 +103,16 @@ X86ISA::SMBios::SMBiosStructure::writeOutStrings( // If there are string fields but none of them are used, that's a // special case which is handled by this if. if (strings.size() == 0 && stringFields) { - proxy->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1); + proxy.writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1); offset++; } else { for (it = strings.begin(); it != strings.end(); it++) { - proxy->writeBlob(addr + offset, + proxy.writeBlob(addr + offset, (uint8_t *)it->c_str(), it->length() + 1); offset += it->length() + 1; } } - proxy->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1); + proxy.writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1); } int @@ -172,30 +172,30 @@ X86ISA::SMBios::BiosInformation::BiosInformation(Params * p) : } uint16_t -X86ISA::SMBios::BiosInformation::writeOut(PortProxy* proxy, Addr addr) +X86ISA::SMBios::BiosInformation::writeOut(PortProxy& proxy, Addr addr) { uint8_t size = SMBiosStructure::writeOut(proxy, addr); - proxy->writeBlob(addr + 0x4, (uint8_t *)(&vendor), 1); - proxy->writeBlob(addr + 0x5, (uint8_t *)(&version), 1); + proxy.writeBlob(addr + 0x4, (uint8_t *)(&vendor), 1); + proxy.writeBlob(addr + 0x5, (uint8_t *)(&version), 1); uint16_t startingAddrSegmentGuest = X86ISA::htog(startingAddrSegment); - proxy->writeBlob(addr + 0x6, (uint8_t *)(&startingAddrSegmentGuest), 2); + proxy.writeBlob(addr + 0x6, (uint8_t *)(&startingAddrSegmentGuest), 2); - proxy->writeBlob(addr + 0x8, (uint8_t *)(&releaseDate), 1); - proxy->writeBlob(addr + 0x9, (uint8_t *)(&romSize), 1); + proxy.writeBlob(addr + 0x8, (uint8_t *)(&releaseDate), 1); + proxy.writeBlob(addr + 0x9, (uint8_t *)(&romSize), 1); uint64_t characteristicsGuest = X86ISA::htog(characteristics); - proxy->writeBlob(addr + 0xA, (uint8_t *)(&characteristicsGuest), 8); + proxy.writeBlob(addr + 0xA, (uint8_t *)(&characteristicsGuest), 8); uint16_t characteristicExtBytesGuest = X86ISA::htog(characteristicExtBytes); - proxy->writeBlob(addr + 0x12, (uint8_t *)(&characteristicExtBytesGuest), 2); + proxy.writeBlob(addr + 0x12, (uint8_t *)(&characteristicExtBytesGuest), 2); - proxy->writeBlob(addr + 0x14, (uint8_t *)(&majorVer), 1); - proxy->writeBlob(addr + 0x15, (uint8_t *)(&minorVer), 1); - proxy->writeBlob(addr + 0x16, (uint8_t *)(&embContFirmwareMajor), 1); - proxy->writeBlob(addr + 0x17, (uint8_t *)(&embContFirmwareMinor), 1); + proxy.writeBlob(addr + 0x14, (uint8_t *)(&majorVer), 1); + proxy.writeBlob(addr + 0x15, (uint8_t *)(&minorVer), 1); + proxy.writeBlob(addr + 0x16, (uint8_t *)(&embContFirmwareMajor), 1); + proxy.writeBlob(addr + 0x17, (uint8_t *)(&embContFirmwareMinor), 1); writeOutStrings(proxy, addr + getLength()); @@ -214,7 +214,7 @@ X86ISA::SMBios::SMBiosTable::SMBiosTable(Params * p) : } void -X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr, +X86ISA::SMBios::SMBiosTable::writeOut(PortProxy& proxy, Addr addr, Addr &headerSize, Addr &structSize) { headerSize = 0x1F; @@ -224,26 +224,26 @@ X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr, */ uint8_t mainChecksum = 0; - proxy->writeBlob(addr, (uint8_t *)smbiosHeader.anchorString, 4); + proxy.writeBlob(addr, (uint8_t *)smbiosHeader.anchorString, 4); for (int i = 0; i < 4; i++) mainChecksum += smbiosHeader.anchorString[i]; // The checksum goes here, but we're figuring it out as we go. - proxy->writeBlob(addr + 0x5, + proxy.writeBlob(addr + 0x5, (uint8_t *)(&smbiosHeader.entryPointLength), 1); mainChecksum += smbiosHeader.entryPointLength; - proxy->writeBlob(addr + 0x6, + proxy.writeBlob(addr + 0x6, (uint8_t *)(&smbiosHeader.majorVersion), 1); mainChecksum += smbiosHeader.majorVersion; - proxy->writeBlob(addr + 0x7, + proxy.writeBlob(addr + 0x7, (uint8_t *)(&smbiosHeader.minorVersion), 1); mainChecksum += smbiosHeader.minorVersion; // Maximum structure size goes here, but we'll figure it out later. - proxy->writeBlob(addr + 0xA, + proxy.writeBlob(addr + 0xA, (uint8_t *)(&smbiosHeader.entryPointRevision), 1); mainChecksum += smbiosHeader.entryPointRevision; - proxy->writeBlob(addr + 0xB, + proxy.writeBlob(addr + 0xB, (uint8_t *)(&smbiosHeader.formattedArea), 5); for (int i = 0; i < 5; i++) mainChecksum += smbiosHeader.formattedArea[i]; @@ -253,7 +253,7 @@ X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr, */ uint8_t intChecksum = 0; - proxy->writeBlob(addr + 0x10, + proxy.writeBlob(addr + 0x10, (uint8_t *)smbiosHeader.intermediateHeader.anchorString, 5); for (int i = 0; i < 5; i++) intChecksum += smbiosHeader.intermediateHeader.anchorString[i]; @@ -263,20 +263,20 @@ X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr, uint32_t tableAddrGuest = X86ISA::htog(smbiosHeader.intermediateHeader.tableAddr); - proxy->writeBlob(addr + 0x18, (uint8_t *)(&tableAddrGuest), 4); + proxy.writeBlob(addr + 0x18, (uint8_t *)(&tableAddrGuest), 4); for (int i = 0; i < 4; i++) { intChecksum += tableAddrGuest; tableAddrGuest >>= 8; } uint16_t numStructs = X86ISA::gtoh(structures.size()); - proxy->writeBlob(addr + 0x1C, (uint8_t *)(&numStructs), 2); + proxy.writeBlob(addr + 0x1C, (uint8_t *)(&numStructs), 2); for (int i = 0; i < 2; i++) { intChecksum += numStructs; numStructs >>= 8; } - proxy->writeBlob(addr + 0x1E, + proxy.writeBlob(addr + 0x1E, (uint8_t *)(&smbiosHeader.intermediateHeader.smbiosBCDRevision), 1); intChecksum += smbiosHeader.intermediateHeader.smbiosBCDRevision; @@ -303,7 +303,7 @@ X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr, */ maxSize = X86ISA::htog(maxSize); - proxy->writeBlob(addr + 0x8, (uint8_t *)(&maxSize), 2); + proxy.writeBlob(addr + 0x8, (uint8_t *)(&maxSize), 2); for (int i = 0; i < 2; i++) { mainChecksum += maxSize; maxSize >>= 8; @@ -311,7 +311,7 @@ X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr, // Set the checksum mainChecksum = -mainChecksum; - proxy->writeBlob(addr + 0x4, (uint8_t *)(&mainChecksum), 1); + proxy.writeBlob(addr + 0x4, (uint8_t *)(&mainChecksum), 1); /* * Intermediate header @@ -319,14 +319,14 @@ X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr, uint16_t tableSize = offset; tableSize = X86ISA::htog(tableSize); - proxy->writeBlob(addr + 0x16, (uint8_t *)(&tableSize), 2); + proxy.writeBlob(addr + 0x16, (uint8_t *)(&tableSize), 2); for (int i = 0; i < 2; i++) { intChecksum += tableSize; tableSize >>= 8; } intChecksum = -intChecksum; - proxy->writeBlob(addr + 0x15, (uint8_t *)(&intChecksum), 1); + proxy.writeBlob(addr + 0x15, (uint8_t *)(&intChecksum), 1); } X86ISA::SMBios::BiosInformation * diff --git a/src/arch/x86/bios/smbios.hh b/src/arch/x86/bios/smbios.hh index 805b03fbb..4b0a61190 100644 --- a/src/arch/x86/bios/smbios.hh +++ b/src/arch/x86/bios/smbios.hh @@ -89,7 +89,7 @@ class SMBiosStructure : public SimObject return 4; } - virtual uint16_t writeOut(PortProxy* proxy, Addr addr); + virtual uint16_t writeOut(PortProxy& proxy, Addr addr); protected: bool stringFields; @@ -98,7 +98,7 @@ class SMBiosStructure : public SimObject std::vector<std::string> strings; - void writeOutStrings(PortProxy* proxy, Addr addr); + void writeOutStrings(PortProxy& proxy, Addr addr); int getStringLength(); @@ -145,7 +145,7 @@ class BiosInformation : public SMBiosStructure BiosInformation(Params * p); uint8_t getLength() { return 0x18; } - uint16_t writeOut(PortProxy* proxy, Addr addr); + uint16_t writeOut(PortProxy& proxy, Addr addr); }; class SMBiosTable : public SimObject @@ -223,7 +223,7 @@ class SMBiosTable : public SimObject smbiosHeader.intermediateHeader.tableAddr = addr; } - void writeOut(PortProxy* proxy, Addr addr, + void writeOut(PortProxy& proxy, Addr addr, Addr &headerSize, Addr &structSize); }; |