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Diffstat (limited to 'src/arch/x86/faults.cc')
-rw-r--r--src/arch/x86/faults.cc28
1 files changed, 5 insertions, 23 deletions
diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc
index 69cbadc93..b9cac0297 100644
--- a/src/arch/x86/faults.cc
+++ b/src/arch/x86/faults.cc
@@ -118,20 +118,11 @@ namespace X86ISA
DPRINTF(TLB, "Invoking an ITLB fault for address %#x at pc %#x.\n",
vaddr, tc->readPC());
Process *p = tc->getProcessPtr();
- Addr paddr;
- bool success = p->pTable->translate(vaddr, paddr);
+ TlbEntry entry;
+ bool success = p->pTable->lookup(vaddr, entry);
if(!success) {
panic("Tried to execute unmapped address %#x.\n", vaddr);
} else {
- TlbEntry entry;
- entry.pageStart = p->pTable->pageAlign(paddr);
- entry.writeable = false;
- entry.user = true;
- entry.uncacheable = false;
- entry.global = false;
- entry.patBit = 0;
- entry.noExec = false;
- entry.size = PageBytes;
Addr alignedVaddr = p->pTable->pageAlign(vaddr);
DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr, entry.pageStart);
tc->getITBPtr()->insert(alignedVaddr, entry);
@@ -143,24 +134,15 @@ namespace X86ISA
DPRINTF(TLB, "Invoking an DTLB fault for address %#x at pc %#x.\n",
vaddr, tc->readPC());
Process *p = tc->getProcessPtr();
- Addr paddr;
- bool success = p->pTable->translate(vaddr, paddr);
+ TlbEntry entry;
+ bool success = p->pTable->lookup(vaddr, entry);
if(!success) {
p->checkAndAllocNextPage(vaddr);
- success = p->pTable->translate(vaddr, paddr);
+ success = p->pTable->lookup(vaddr, entry);
}
if(!success) {
panic("Tried to access unmapped address %#x.\n", vaddr);
} else {
- TlbEntry entry;
- entry.pageStart = p->pTable->pageAlign(paddr);
- entry.writeable = true;
- entry.user = true;
- entry.uncacheable = false;
- entry.global = false;
- entry.patBit = 0;
- entry.noExec = true;
- entry.size = PageBytes;
Addr alignedVaddr = p->pTable->pageAlign(vaddr);
DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr, entry.pageStart);
tc->getDTBPtr()->insert(alignedVaddr, entry);