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Diffstat (limited to 'src/arch/x86/faults.hh')
-rw-r--r--src/arch/x86/faults.hh41
1 files changed, 29 insertions, 12 deletions
diff --git a/src/arch/x86/faults.hh b/src/arch/x86/faults.hh
index 31bb686ed..0579be9b5 100644
--- a/src/arch/x86/faults.hh
+++ b/src/arch/x86/faults.hh
@@ -111,10 +111,7 @@ namespace X86ISA
{}
#if FULL_SYSTEM
- void invoke(ThreadContext * tc)
- {
- panic("X86 faults are not implemented!");
- }
+ void invoke(ThreadContext * tc);
#endif
};
@@ -127,10 +124,7 @@ namespace X86ISA
{}
#if FULL_SYSTEM
- void invoke(ThreadContext * tc)
- {
- panic("X86 faults are not implemented!");
- }
+ void invoke(ThreadContext * tc);
#endif
};
@@ -143,10 +137,7 @@ namespace X86ISA
{}
#if FULL_SYSTEM
- void invoke(ThreadContext * tc)
- {
- panic("X86 faults are not implemented!");
- }
+ void invoke(ThreadContext * tc);
#endif
};
@@ -372,18 +363,44 @@ namespace X86ISA
// the tlb on a miss and are to take the place of a hardware table walker.
class FakeITLBFault : public X86Fault
{
+#if !FULL_SYSTEM
+ protected:
+ Addr vaddr;
+ public:
+ FakeITLBFault(Addr _vaddr) :
+ X86Fault("fake instruction tlb fault", "itlb"),
+ vaddr(_vaddr)
+#else
public:
FakeITLBFault() :
X86Fault("fake instruction tlb fault", "itlb")
+#endif
{}
+
+#if !FULL_SYSTEM
+ void invoke(ThreadContext * tc);
+#endif
};
class FakeDTLBFault : public X86Fault
{
+#if !FULL_SYSTEM
+ protected:
+ Addr vaddr;
+ public:
+ FakeDTLBFault(Addr _vaddr) :
+ X86Fault("fake data tlb fault", "dtlb"),
+ vaddr(_vaddr)
+#else
public:
FakeDTLBFault() :
X86Fault("fake data tlb fault", "dtlb")
+#endif
{}
+
+#if !FULL_SYSTEM
+ void invoke(ThreadContext * tc);
+#endif
};
};