diff options
Diffstat (limited to 'src/arch/x86/insts')
| -rw-r--r-- | src/arch/x86/insts/microfpop.cc | 85 | ||||
| -rw-r--r-- | src/arch/x86/insts/microfpop.hh | 104 | ||||
| -rw-r--r-- | src/arch/x86/insts/microop.cc | 139 | ||||
| -rw-r--r-- | src/arch/x86/insts/microop.hh | 43 | ||||
| -rw-r--r-- | src/arch/x86/insts/microregop.cc | 76 | ||||
| -rw-r--r-- | src/arch/x86/insts/microregop.hh | 42 |
6 files changed, 371 insertions, 118 deletions
diff --git a/src/arch/x86/insts/microfpop.cc b/src/arch/x86/insts/microfpop.cc new file mode 100644 index 000000000..c25495da9 --- /dev/null +++ b/src/arch/x86/insts/microfpop.cc @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2007 The Hewlett-Packard Development Company + * All rights reserved. + * + * Redistribution and use of this software in source and binary forms, + * with or without modification, are permitted provided that the + * following conditions are met: + * + * The software must be used only for Non-Commercial Use which means any + * use which is NOT directed to receiving any direct monetary + * compensation for, or commercial advantage from such use. Illustrative + * examples of non-commercial use are academic research, personal study, + * teaching, education and corporate research & development. + * Illustrative examples of commercial use are distributing products for + * commercial advantage and providing services using the software for + * commercial advantage. + * + * If you wish to use this software or functionality therein that may be + * covered by patents for commercial use, please contact: + * Director of Intellectual Property Licensing + * Office of Strategy and Technology + * Hewlett-Packard Company + * 1501 Page Mill Road + * Palo Alto, California 94304 + * + * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. Redistributions + * in binary form must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. Neither the name of + * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. No right of + * sublicense is granted herewith. Derivatives of the software and + * output created using the software may be prepared, but only for + * Non-Commercial Uses. Derivatives of the software may be shared with + * others provided: (i) the others agree to abide by the list of + * conditions herein which includes the Non-Commercial Use restrictions; + * and (ii) such Derivatives of the software include the above copyright + * notice to acknowledge the contribution from this software where + * applicable, this list of conditions and the disclaimer below. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#include "arch/x86/insts/microfpop.hh" +#include "arch/x86/miscregs.hh" +#include <string> + +namespace X86ISA +{ + /* + uint64_t FpOp::genFlags(uint64_t oldFlags, uint64_t flagMask, + uint64_t _dest, uint64_t _src1, uint64_t _src2, + bool subtract) const + { + } + */ + + std::string FpOp::generateDisassembly(Addr pc, + const SymbolTable *symtab) const + { + std::stringstream response; + + printMnemonic(response, instMnem, mnemonic); + printDestReg(response, 0, dataSize); + response << ", "; + printSrcReg(response, 0, dataSize); + response << ", "; + printSrcReg(response, 1, dataSize); + return response.str(); + } +} diff --git a/src/arch/x86/insts/microfpop.hh b/src/arch/x86/insts/microfpop.hh new file mode 100644 index 000000000..2e01cadbc --- /dev/null +++ b/src/arch/x86/insts/microfpop.hh @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2007 The Hewlett-Packard Development Company + * All rights reserved. + * + * Redistribution and use of this software in source and binary forms, + * with or without modification, are permitted provided that the + * following conditions are met: + * + * The software must be used only for Non-Commercial Use which means any + * use which is NOT directed to receiving any direct monetary + * compensation for, or commercial advantage from such use. Illustrative + * examples of non-commercial use are academic research, personal study, + * teaching, education and corporate research & development. + * Illustrative examples of commercial use are distributing products for + * commercial advantage and providing services using the software for + * commercial advantage. + * + * If you wish to use this software or functionality therein that may be + * covered by patents for commercial use, please contact: + * Director of Intellectual Property Licensing + * Office of Strategy and Technology + * Hewlett-Packard Company + * 1501 Page Mill Road + * Palo Alto, California 94304 + * + * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. Redistributions + * in binary form must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. Neither the name of + * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. No right of + * sublicense is granted herewith. Derivatives of the software and + * output created using the software may be prepared, but only for + * Non-Commercial Uses. Derivatives of the software may be shared with + * others provided: (i) the others agree to abide by the list of + * conditions herein which includes the Non-Commercial Use restrictions; + * and (ii) such Derivatives of the software include the above copyright + * notice to acknowledge the contribution from this software where + * applicable, this list of conditions and the disclaimer below. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#ifndef __ARCH_X86_INSTS_MICROFPOP_HH__ +#define __ARCH_X86_INSTS_MICROFPOP_HH__ + +#include "arch/x86/insts/microop.hh" + +namespace X86ISA +{ + + /** + * Base classes for FpOps which provides a generateDisassembly method. + */ + class FpOp : public X86MicroopBase + { + protected: + const RegIndex src1; + const RegIndex src2; + const RegIndex dest; + const uint8_t dataSize; + const int8_t spm; + + // Constructor + FpOp(ExtMachInst _machInst, + const char *mnem, const char *_instMnem, + bool isMicro, bool isDelayed, + bool isFirst, bool isLast, + RegIndex _src1, RegIndex _src2, RegIndex _dest, + uint8_t _dataSize, int8_t _spm, + OpClass __opClass) : + X86MicroopBase(_machInst, mnem, _instMnem, + isMicro, isDelayed, isFirst, isLast, + __opClass), + src1(_src1), src2(_src2), dest(_dest), + dataSize(_dataSize), spm(_spm) + {} +/* + //Figure out what the condition code flags should be. + uint64_t genFlags(uint64_t oldFlags, uint64_t flagMask, + uint64_t _dest, uint64_t _src1, uint64_t _src2, + bool subtract = false) const; + bool checkCondition(uint64_t flags) const;*/ + + std::string generateDisassembly(Addr pc, + const SymbolTable *symtab) const; + }; +} + +#endif //__ARCH_X86_INSTS_MICROFPOP_HH__ diff --git a/src/arch/x86/insts/microop.cc b/src/arch/x86/insts/microop.cc new file mode 100644 index 000000000..6caa27f36 --- /dev/null +++ b/src/arch/x86/insts/microop.cc @@ -0,0 +1,139 @@ +/* + * Copyright (c) 2007 The Hewlett-Packard Development Company + * All rights reserved. + * + * Redistribution and use of this software in source and binary forms, + * with or without modification, are permitted provided that the + * following conditions are met: + * + * The software must be used only for Non-Commercial Use which means any + * use which is NOT directed to receiving any direct monetary + * compensation for, or commercial advantage from such use. Illustrative + * examples of non-commercial use are academic research, personal study, + * teaching, education and corporate research & development. + * Illustrative examples of commercial use are distributing products for + * commercial advantage and providing services using the software for + * commercial advantage. + * + * If you wish to use this software or functionality therein that may be + * covered by patents for commercial use, please contact: + * Director of Intellectual Property Licensing + * Office of Strategy and Technology + * Hewlett-Packard Company + * 1501 Page Mill Road + * Palo Alto, California 94304 + * + * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. Redistributions + * in binary form must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. Neither the name of + * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. No right of + * sublicense is granted herewith. Derivatives of the software and + * output created using the software may be prepared, but only for + * Non-Commercial Uses. Derivatives of the software may be shared with + * others provided: (i) the others agree to abide by the list of + * conditions herein which includes the Non-Commercial Use restrictions; + * and (ii) such Derivatives of the software include the above copyright + * notice to acknowledge the contribution from this software where + * applicable, this list of conditions and the disclaimer below. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#include "arch/x86/insts/microop.hh" +#include "arch/x86/miscregs.hh" + +namespace X86ISA +{ + + bool X86MicroopBase::checkCondition(uint64_t flags, int condition) const + { + CCFlagBits ccflags = flags; + switch(condition) + { + case ConditionTests::True: + return true; + case ConditionTests::ECF: + return ccflags.ECF; + case ConditionTests::EZF: + return ccflags.EZF; + case ConditionTests::SZnZF: + return !(!ccflags.EZF & ccflags.ZF); + case ConditionTests::MSTRZ: + panic("This condition is not implemented!"); + case ConditionTests::STRZ: + panic("This condition is not implemented!"); + case ConditionTests::MSTRC: + panic("This condition is not implemented!"); + case ConditionTests::STRZnEZF: + return !ccflags.EZF & ccflags.ZF; + //And no interrupts or debug traps are waiting + case ConditionTests::OF: + return ccflags.OF; + case ConditionTests::CF: + return ccflags.CF; + case ConditionTests::ZF: + return ccflags.ZF; + case ConditionTests::CvZF: + return ccflags.CF | ccflags.ZF; + case ConditionTests::SF: + return ccflags.SF; + case ConditionTests::PF: + return ccflags.PF; + case ConditionTests::SxOF: + return ccflags.SF ^ ccflags.OF; + case ConditionTests::SxOvZF: + return ccflags.SF ^ ccflags.OF | ccflags.ZF; + case ConditionTests::False: + return false; + case ConditionTests::NotECF: + return !ccflags.ECF; + case ConditionTests::NotEZF: + return !ccflags.EZF; + case ConditionTests::NotSZnZF: + return !ccflags.EZF & ccflags.ZF; + case ConditionTests::NotMSTRZ: + panic("This condition is not implemented!"); + case ConditionTests::NotSTRZ: + panic("This condition is not implemented!"); + case ConditionTests::NotMSTRC: + panic("This condition is not implemented!"); + case ConditionTests::STRnZnEZF: + return !ccflags.EZF & !ccflags.ZF; + //And no interrupts or debug traps are waiting + case ConditionTests::NotOF: + return !ccflags.OF; + case ConditionTests::NotCF: + return !ccflags.CF; + case ConditionTests::NotZF: + return !ccflags.ZF; + case ConditionTests::NotCvZF: + return !(ccflags.CF | ccflags.ZF); + case ConditionTests::NotSF: + return !ccflags.SF; + case ConditionTests::NotPF: + return !ccflags.PF; + case ConditionTests::NotSxOF: + return !(ccflags.SF ^ ccflags.OF); + case ConditionTests::NotSxOvZF: + return !(ccflags.SF ^ ccflags.OF | ccflags.ZF); + } + panic("Unknown condition: %d\n", condition); + return true; + } +} diff --git a/src/arch/x86/insts/microop.hh b/src/arch/x86/insts/microop.hh index 45e1cb5c8..535bcb817 100644 --- a/src/arch/x86/insts/microop.hh +++ b/src/arch/x86/insts/microop.hh @@ -62,6 +62,47 @@ namespace X86ISA { + namespace ConditionTests + { + enum CondTest { + True, + NotFalse = True, + ECF, + EZF, + SZnZF, + MSTRZ, + STRZ, + MSTRC, + STRZnEZF, + OF, + CF, + ZF, + CvZF, + SF, + PF, + SxOF, + SxOvZF, + + False, + NotTrue = False, + NotECF, + NotEZF, + NotSZnZF, + NotMSTRZ, + NotSTRZ, + NotMSTRC, + STRnZnEZF, + NotOF, + NotCF, + NotZF, + NotCvZF, + NotSF, + NotPF, + NotSxOF, + NotSxOvZF + }; + } + //A class which is the base of all x86 micro ops. It provides a function to //set necessary flags appropriately. class X86MicroopBase : public X86StaticInst @@ -94,6 +135,8 @@ namespace X86ISA return ss.str(); } + + bool checkCondition(uint64_t flags, int condition) const; }; } diff --git a/src/arch/x86/insts/microregop.cc b/src/arch/x86/insts/microregop.cc index ad48a4bc1..60f32857d 100644 --- a/src/arch/x86/insts/microregop.cc +++ b/src/arch/x86/insts/microregop.cc @@ -93,82 +93,6 @@ namespace X86ISA return flags; } - bool RegOpBase::checkCondition(uint64_t flags) const - { - CCFlagBits ccflags = flags; - switch(ext) - { - case ConditionTests::True: - return true; - case ConditionTests::ECF: - return ccflags.ECF; - case ConditionTests::EZF: - return ccflags.EZF; - case ConditionTests::SZnZF: - return !(!ccflags.EZF & ccflags.ZF); - case ConditionTests::MSTRZ: - panic("This condition is not implemented!"); - case ConditionTests::STRZ: - panic("This condition is not implemented!"); - case ConditionTests::MSTRC: - panic("This condition is not implemented!"); - case ConditionTests::STRZnEZF: - return !ccflags.EZF & ccflags.ZF; - //And no interrupts or debug traps are waiting - case ConditionTests::OF: - return ccflags.OF; - case ConditionTests::CF: - return ccflags.CF; - case ConditionTests::ZF: - return ccflags.ZF; - case ConditionTests::CvZF: - return ccflags.CF | ccflags.ZF; - case ConditionTests::SF: - return ccflags.SF; - case ConditionTests::PF: - return ccflags.PF; - case ConditionTests::SxOF: - return ccflags.SF ^ ccflags.OF; - case ConditionTests::SxOvZF: - return ccflags.SF ^ ccflags.OF | ccflags.ZF; - case ConditionTests::False: - return false; - case ConditionTests::NotECF: - return !ccflags.ECF; - case ConditionTests::NotEZF: - return !ccflags.EZF; - case ConditionTests::NotSZnZF: - return !ccflags.EZF & ccflags.ZF; - case ConditionTests::NotMSTRZ: - panic("This condition is not implemented!"); - case ConditionTests::NotSTRZ: - panic("This condition is not implemented!"); - case ConditionTests::NotMSTRC: - panic("This condition is not implemented!"); - case ConditionTests::STRnZnEZF: - return !ccflags.EZF & !ccflags.ZF; - //And no interrupts or debug traps are waiting - case ConditionTests::NotOF: - return !ccflags.OF; - case ConditionTests::NotCF: - return !ccflags.CF; - case ConditionTests::NotZF: - return !ccflags.ZF; - case ConditionTests::NotCvZF: - return !(ccflags.CF | ccflags.ZF); - case ConditionTests::NotSF: - return !ccflags.SF; - case ConditionTests::NotPF: - return !ccflags.PF; - case ConditionTests::NotSxOF: - return !(ccflags.SF ^ ccflags.OF); - case ConditionTests::NotSxOvZF: - return !(ccflags.SF ^ ccflags.OF | ccflags.ZF); - } - panic("Unknown condition: %d\n", ext); - return true; - } - std::string RegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { diff --git a/src/arch/x86/insts/microregop.hh b/src/arch/x86/insts/microregop.hh index f6bebb763..d805adb33 100644 --- a/src/arch/x86/insts/microregop.hh +++ b/src/arch/x86/insts/microregop.hh @@ -62,47 +62,6 @@ namespace X86ISA { - namespace ConditionTests - { - enum CondTest { - True, - NotFalse = True, - ECF, - EZF, - SZnZF, - MSTRZ, - STRZ, - MSTRC, - STRZnEZF, - OF, - CF, - ZF, - CvZF, - SF, - PF, - SxOF, - SxOvZF, - - False, - NotTrue = False, - NotECF, - NotEZF, - NotSZnZF, - NotMSTRZ, - NotSTRZ, - NotMSTRC, - STRnZnEZF, - NotOF, - NotCF, - NotZF, - NotCvZF, - NotSF, - NotPF, - NotSxOF, - NotSxOvZF - }; - } - /** * Base classes for RegOps which provides a generateDisassembly method. */ @@ -136,7 +95,6 @@ namespace X86ISA uint64_t genFlags(uint64_t oldFlags, uint64_t flagMask, uint64_t _dest, uint64_t _src1, uint64_t _src2, bool subtract = false) const; - bool checkCondition(uint64_t flags) const; }; class RegOp : public RegOpBase |