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+// -*- mode:c++ -*-
+
+// Copyright (c) 2007 The Hewlett-Packard Development Company
+// All rights reserved.
+//
+// Redistribution and use of this software in source and binary forms,
+// with or without modification, are permitted provided that the
+// following conditions are met:
+//
+// The software must be used only for Non-Commercial Use which means any
+// use which is NOT directed to receiving any direct monetary
+// compensation for, or commercial advantage from such use. Illustrative
+// examples of non-commercial use are academic research, personal study,
+// teaching, education and corporate research & development.
+// Illustrative examples of commercial use are distributing products for
+// commercial advantage and providing services using the software for
+// commercial advantage.
+//
+// If you wish to use this software or functionality therein that may be
+// covered by patents for commercial use, please contact:
+// Director of Intellectual Property Licensing
+// Office of Strategy and Technology
+// Hewlett-Packard Company
+// 1501 Page Mill Road
+// Palo Alto, California 94304
+//
+// Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer. Redistributions
+// in binary form must reproduce the above copyright notice, this list of
+// conditions and the following disclaimer in the documentation and/or
+// other materials provided with the distribution. Neither the name of
+// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission. No right of
+// sublicense is granted herewith. Derivatives of the software and
+// output created using the software may be prepared, but only for
+// Non-Commercial Uses. Derivatives of the software may be shared with
+// others provided: (i) the others agree to abide by the list of
+// conditions herein which includes the Non-Commercial Use restrictions;
+// and (ii) such Derivatives of the software include the above copyright
+// notice to acknowledge the contribution from this software where
+// applicable, this list of conditions and the disclaimer below.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+// Authors: Gabe Black
+
+////////////////////////////////////////////////////////////////////
+//
+// Instructions that do the same thing to multiple sets of arguments.
+//
+
+output header {{
+
+ // Base class for most macroops, except ones that need to commit as
+ // they go.
+ class X86MacroInst : public X86StaticInst
+ {
+ protected:
+ const uint32_t numMicroOps;
+
+ //Constructor.
+ X86MacroInst(const char *mnem, ExtMachInst _machInst,
+ uint32_t _numMicroOps)
+ : X86StaticInst(mnem, _machInst, No_OpClass),
+ numMicroOps(_numMicroOps)
+ {
+ assert(numMicroOps);
+ microOps = new StaticInstPtr[numMicroOps];
+ flags[IsMacroOp] = true;
+ }
+
+ ~X86MacroInst()
+ {
+ delete [] microOps;
+ }
+
+ std::string generateDisassembly(Addr pc,
+ const SymbolTable *symtab) const;
+
+ StaticInstPtr * microOps;
+
+ StaticInstPtr fetchMicroOp(MicroPC microPC)
+ {
+ assert(microPC < numMicroOps);
+ return microOps[microPC];
+ }
+
+ %(BasicExecPanic)s
+ };
+
+ // Base class for macroops which commit as they go. This is for
+ // instructions which can be partially completed like those with the
+ // rep prefix. This prevents those instructions from overflowing
+ // buffers with uncommitted microops.
+ class X86RollingMacroInst : public X86MacroInst
+ {
+ protected:
+ //Constructor.
+ X86RollingMacroInst(const char *mnem, ExtMachInst _machInst,
+ uint32_t _numMicroOps)
+ : X86MacroInst(mnem, _machInst, numMicroOps)
+ {}
+ };
+}};
+
+// Basic instruction class constructor template.
+def template MacroConstructor {{
+ inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
+ : %(base_class)s("%(mnemonic)s", machInst, %(num_micro_ops)s)
+ {
+ %(constructor)s;
+ //alloc_micro_ops is the code that sets up the microOps
+ //array in the parent class. This hook will hopefully
+ //allow all that to be automated.
+ %(alloc_micro_ops)s;
+ setMicroFlags();
+ }
+}};
+
+let {{
+ def genMacroOp(name, Name, ops, rolling = False):
+ baseClass = 'X86MacroInst'
+ if rolling:
+ baseClass = 'X86RollingMacroInst'
+ numMicroOps = len(ops)
+ allocMicroOps = ''
+ micropc = 0
+ allocMicroOps += \
+ "microOps[0] = %s;\n" % \
+ op.getAllocator(True, not rolling, True, False)
+ micropc += 1
+ if numMicroOps > 2:
+ for op in ops[1:-1]:
+ allocMicroOps += \
+ "microOps[%d] = %s;\n" % \
+ (micropc, op.getAllocator(True, not rolling, False, False))
+ micropc += 1
+ allocMicroOps += \
+ "microOps[%d] = %s;\n" % \
+ op.getAllocator(True, not rolling, False, True)
+ iop = InstObjParams(name, Name, baseClass,
+ {'code' : '', 'num_micro_ops' : numMicroOps,
+ 'alloc_micro_ops' : allocMicroOps})
+ header_output = BasicDeclare.subst(iop)
+ decoder_output = MacroConstructor.subst(iop)
+ decode_block = BasicDecode.subst(iop)
+ exec_output = ''
+ return (header_output, decoder_output, decode_block, exec_output)
+}};