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-rw-r--r--src/arch/x86/isa/formats/error.isa2
-rw-r--r--src/arch/x86/isa/formats/formats.isa4
-rw-r--r--src/arch/x86/isa/formats/syscall.isa112
-rw-r--r--src/arch/x86/isa/formats/unimp.isa8
4 files changed, 121 insertions, 5 deletions
diff --git a/src/arch/x86/isa/formats/error.isa b/src/arch/x86/isa/formats/error.isa
index 8ac2ea44d..e85eff762 100644
--- a/src/arch/x86/isa/formats/error.isa
+++ b/src/arch/x86/isa/formats/error.isa
@@ -64,7 +64,7 @@
def template ErrorDecode {{
{
- panic("X86 decoder internal error: '%%s' %%s",
+ panic("X86 decoder internal error: '%s' %s",
%(message)s, machInst);
}
}};
diff --git a/src/arch/x86/isa/formats/formats.isa b/src/arch/x86/isa/formats/formats.isa
index d763c05bc..1e7bb4a74 100644
--- a/src/arch/x86/isa/formats/formats.isa
+++ b/src/arch/x86/isa/formats/formats.isa
@@ -98,3 +98,7 @@
//Include a format which implements a batch of instructions which do the same
//thing on a variety of inputs
##include "multi.isa"
+
+//Include a format which makes instructions who's sole purpose is to generate
+//a syscall.
+##include "syscall.isa"
diff --git a/src/arch/x86/isa/formats/syscall.isa b/src/arch/x86/isa/formats/syscall.isa
new file mode 100644
index 000000000..8b860dba4
--- /dev/null
+++ b/src/arch/x86/isa/formats/syscall.isa
@@ -0,0 +1,112 @@
+// -*- mode:c++ -*-
+
+// Copyright (c) 2007 The Hewlett-Packard Development Company
+// All rights reserved.
+//
+// Redistribution and use of this software in source and binary forms,
+// with or without modification, are permitted provided that the
+// following conditions are met:
+//
+// The software must be used only for Non-Commercial Use which means any
+// use which is NOT directed to receiving any direct monetary
+// compensation for, or commercial advantage from such use. Illustrative
+// examples of non-commercial use are academic research, personal study,
+// teaching, education and corporate research & development.
+// Illustrative examples of commercial use are distributing products for
+// commercial advantage and providing services using the software for
+// commercial advantage.
+//
+// If you wish to use this software or functionality therein that may be
+// covered by patents for commercial use, please contact:
+// Director of Intellectual Property Licensing
+// Office of Strategy and Technology
+// Hewlett-Packard Company
+// 1501 Page Mill Road
+// Palo Alto, California 94304
+//
+// Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer. Redistributions
+// in binary form must reproduce the above copyright notice, this list of
+// conditions and the following disclaimer in the documentation and/or
+// other materials provided with the distribution. Neither the name of
+// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission. No right of
+// sublicense is granted herewith. Derivatives of the software and
+// output created using the software may be prepared, but only for
+// Non-Commercial Uses. Derivatives of the software may be shared with
+// others provided: (i) the others agree to abide by the list of
+// conditions herein which includes the Non-Commercial Use restrictions;
+// and (ii) such Derivatives of the software include the above copyright
+// notice to acknowledge the contribution from this software where
+// applicable, this list of conditions and the disclaimer below.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+// Authors: Gabe Black
+
+////////////////////////////////////////////////////////////////////
+//
+// "Format" which describes an instruction whose only purpose is to
+// call a syscall in SE mode.
+//
+
+output header {{
+ class SyscallInst : public X86ISA::X86StaticInst
+ {
+ public:
+ /// Constructor
+ SyscallInst(const char *_mnemonic, ExtMachInst _machInst,
+ OpClass __opClass) :
+ X86ISA::X86StaticInst(_mnemonic, _machInst, __opClass)
+ {
+ }
+
+ std::string generateDisassembly(Addr pc,
+ const SymbolTable *symtab) const;
+ };
+}};
+
+output decoder {{
+ std::string SyscallInst::generateDisassembly(Addr PC,
+ const SymbolTable *symtab) const
+ {
+ std::stringstream response;
+
+ printMnemonic(response, mnemonic);
+ ccprintf(response, " ");
+ printReg(response, _srcRegIdx[0], machInst.opSize);
+ return response.str();
+ }
+}};
+
+def template SyscallExecute {{
+ Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
+ Trace::InstRecord *traceData) const
+ {
+ Fault fault = NoFault;
+ %(op_decl)s;
+ %(op_rd)s;
+ %(code)s;
+ return fault;
+ }
+}};
+
+def format SyscallInst(code, *opt_flags) {{
+ iop = InstObjParams(name, Name, 'SyscallInst', code, opt_flags)
+ header_output = BasicDeclare.subst(iop)
+ decoder_output = BasicConstructor.subst(iop)
+ decode_block = BasicDecode.subst(iop)
+ exec_output = SyscallExecute.subst(iop)
+}};
+
diff --git a/src/arch/x86/isa/formats/unimp.isa b/src/arch/x86/isa/formats/unimp.isa
index 12fa8387b..183beb3b8 100644
--- a/src/arch/x86/isa/formats/unimp.isa
+++ b/src/arch/x86/isa/formats/unimp.isa
@@ -68,12 +68,12 @@ output header {{
* 'Unknown' class is used for unrecognized/illegal instructions.
* This is a leaf class.
*/
- class FailUnimplemented : public X86StaticInst
+ class FailUnimplemented : public X86ISA::X86StaticInst
{
public:
/// Constructor
FailUnimplemented(const char *_mnemonic, ExtMachInst _machInst)
- : X86StaticInst(_mnemonic, _machInst, No_OpClass)
+ : X86ISA::X86StaticInst(_mnemonic, _machInst, No_OpClass)
{
// don't call execute() (which panics) if we're on a
// speculative path
@@ -95,7 +95,7 @@ output header {{
* probably make the 'warned' flag a static member of the derived
* class.
*/
- class WarnUnimplemented : public X86StaticInst
+ class WarnUnimplemented : public X86ISA::X86StaticInst
{
private:
/// Have we warned on this instruction yet?
@@ -104,7 +104,7 @@ output header {{
public:
/// Constructor
WarnUnimplemented(const char *_mnemonic, ExtMachInst _machInst)
- : X86StaticInst(_mnemonic, _machInst, No_OpClass), warned(false)
+ : X86ISA::X86StaticInst(_mnemonic, _machInst, No_OpClass), warned(false)
{
// don't call execute() (which panics) if we're on a
// speculative path