diff options
Diffstat (limited to 'src/arch/x86/isa/insts/arithmetic')
3 files changed, 70 insertions, 76 deletions
diff --git a/src/arch/x86/isa/insts/arithmetic/add_and_subtract.py b/src/arch/x86/isa/insts/arithmetic/add_and_subtract.py index de4996f54..87fbb796c 100644 --- a/src/arch/x86/isa/insts/arithmetic/add_and_subtract.py +++ b/src/arch/x86/isa/insts/arithmetic/add_and_subtract.py @@ -68,45 +68,45 @@ def macroop ADD_R_I def macroop ADD_M_I { limm t2, imm - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop ADD_P_I { rdip t7 limm t2, imm - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop ADD_M_R { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop ADD_P_R { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop ADD_R_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp add reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) }; def macroop ADD_R_P { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp add reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) }; @@ -123,47 +123,47 @@ def macroop SUB_R_I def macroop SUB_R_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp sub reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) }; def macroop SUB_R_P { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp sub reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) }; def macroop SUB_M_I { limm t2, imm - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop SUB_P_I { rdip t7 limm t2, imm - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop SUB_M_R { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop SUB_P_R { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop ADC_R_R @@ -180,45 +180,45 @@ def macroop ADC_R_I def macroop ADC_M_I { limm t2, imm - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop ADC_P_I { rdip t7 limm t2, imm - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop ADC_M_R { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop ADC_P_R { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop ADC_R_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp adc reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) }; def macroop ADC_R_P { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp adc reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) }; @@ -235,47 +235,47 @@ def macroop SBB_R_I def macroop SBB_R_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp sbb reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) }; def macroop SBB_R_P { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp sbb reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) }; def macroop SBB_M_I { limm t2, imm - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop SBB_P_I { rdip t7 limm t2, imm - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop SBB_M_R { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop SBB_P_R { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop NEG_R @@ -285,16 +285,16 @@ def macroop NEG_R def macroop NEG_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop NEG_P { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF) - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; ''' diff --git a/src/arch/x86/isa/insts/arithmetic/increment_and_decrement.py b/src/arch/x86/isa/insts/arithmetic/increment_and_decrement.py index f53fa8f05..2a8024eee 100644 --- a/src/arch/x86/isa/insts/arithmetic/increment_and_decrement.py +++ b/src/arch/x86/isa/insts/arithmetic/increment_and_decrement.py @@ -61,17 +61,17 @@ def macroop INC_R def macroop INC_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp addi t1, t1, 1, flags=(OF, SF, ZF, AF, PF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop INC_P { rdip t7 - ld t1, ds, [0, t0, t7], disp - addi reg, reg, 1, flags=(OF, SF, ZF, AF, PF) - st t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp + addi t1, t1, 1, flags=(OF, SF, ZF, AF, PF) + st t1, seg, riprel, disp }; def macroop DEC_R @@ -81,16 +81,16 @@ def macroop DEC_R def macroop DEC_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp subi t1, t1, 1, flags=(OF, SF, ZF, AF, PF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop DEC_P { rdip t7 - ld t1, ds, [0, t0, t7], disp - subi reg, reg, 1, flags=(OF, SF, ZF, AF, PF) - st t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp + subi t1, t1, 1, flags=(OF, SF, ZF, AF, PF) + st t1, seg, riprel, disp }; ''' diff --git a/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py b/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py index 5355775eb..a865e163b 100644 --- a/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py +++ b/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py @@ -66,14 +66,14 @@ def macroop MUL_B_R def macroop MUL_B_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp mul1u rax, rax, t1, dataSize="2" }; def macroop MUL_B_P { rdip t7 - ld t1, ds, [scale, index, base], disp + ld t1, seg, riprel, disp mul1u rax, rax, t1, dataSize="2" }; @@ -89,7 +89,7 @@ def macroop MUL_R def macroop MUL_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp muleh rdx, rax, t1 mulel rax, rax, t1 }; @@ -97,7 +97,7 @@ def macroop MUL_M def macroop MUL_P { rdip t7 - ld t1, ds, [scale, index, base], disp + ld t1, seg, riprel, disp muleh rdx, rax, t1 mulel rax, rax, t1 }; @@ -113,14 +113,14 @@ def macroop IMUL_B_R def macroop IMUL_B_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp mul1s rax, rax, t1, dataSize="2" }; def macroop IMUL_B_P { rdip t7 - ld t1, ds, [scale, index, base], disp + ld t1, seg, riprel, disp mul1s rax, rax, t1, dataSize="2" }; @@ -136,7 +136,7 @@ def macroop IMUL_R def macroop IMUL_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp muleh rdx, rax, t1 mulel rax, rax, t1 }; @@ -144,7 +144,7 @@ def macroop IMUL_M def macroop IMUL_P { rdip t7 - ld t1, ds, [scale, index, base], disp + ld t1, seg, riprel, disp muleh rdx, rax, t1 mulel rax, rax, t1 }; @@ -161,14 +161,14 @@ def macroop IMUL_R_R def macroop IMUL_R_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp mulel reg, reg, t1 }; def macroop IMUL_R_P { rdip t7 - ld t1, ds, [scale, index, base], disp + ld t1, seg, riprel, disp mulel reg, reg, t1 }; @@ -185,7 +185,7 @@ def macroop IMUL_R_R_I def macroop IMUL_R_M_I { limm t1, imm - ld t2, ds, [scale, index, base], disp + ld t2, seg, sib, disp mulel reg, t2, t1 }; @@ -193,7 +193,7 @@ def macroop IMUL_R_P_I { rdip t7 limm t1, imm - ld t2, ds, [0, t0, t7] + ld t2, seg, riprel mulel reg, t2, t1 }; @@ -208,14 +208,14 @@ def macroop DIV_B_R def macroop DIV_B_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp div1 rax, rax, t1 }; def macroop DIV_B_P { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp div1 rax, rax, t1 }; @@ -231,7 +231,7 @@ def macroop DIV_R def macroop DIV_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp divr rdx, rax, t1 divq rax, rax, t1 }; @@ -239,18 +239,12 @@ def macroop DIV_M def macroop DIV_P { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp divr rdx, rax, t1 divq rax, rax, t1 }; ''' #let {{ -# class MUL(Inst): -# "GenFault ${new UnimpInstFault}" -# class IMUL(Inst): -# "GenFault ${new UnimpInstFault}" -# class DIV(Inst): -# "GenFault ${new UnimpInstFault}" # class IDIV(Inst): # "GenFault ${new UnimpInstFault}" #}}; |