1 files changed, 53 insertions, 5 deletions
diff --git a/src/arch/x86/isa/insts/compare_and_test/compare.py b/src/arch/x86/isa/insts/compare_and_test/compare.py
index 12b5b859f..8f5890b23 100644
--- a/src/arch/x86/isa/insts/compare_and_test/compare.py
+++ b/src/arch/x86/isa/insts/compare_and_test/compare.py
@@ -53,8 +53,56 @@
 #
 # Authors: Gabe Black
 
-microcode = ""
-#let {{
-#    class CMP(Inst):
-#	"GenFault ${new UnimpInstFault}"
-#}};
+microcode = '''
+def macroop CMP_R_M
+{
+    ld t1, ds, [scale, index, base], disp
+    sub t0, reg, t1, flags=(OF, SF, ZF, AF, PF, CF)
+};
+
+def macroop CMP_R_P
+{
+    rdip t7
+    ld t1, ds, [0, t0, t7], disp
+    sub t0, reg, t1, flags=(OF, SF, ZF, AF, PF, CF)
+};
+
+def macroop CMP_M_I
+{
+    limm t2, imm
+    ld t1, ds, [scale, index, base], disp
+    sub t0, t1, t2, flags=(OF, SF, ZF, AF, PF, CF)
+};
+
+def macroop CMP_P_I
+{
+    limm t2, imm
+    rdip t7
+    ld t1, ds, [0, t0, t7], disp
+    sub t0, t1, t2, flags=(OF, SF, ZF, AF, PF, CF)
+};
+
+def macroop CMP_M_R
+{
+    ld t1, ds, [scale, index, base], disp
+    sub t0, t1, reg, flags=(OF, SF, ZF, AF, PF, CF)
+};
+
+def macroop CMP_P_R
+{
+    rdip t7
+    ld t1, ds, [0, t0, t7], disp
+    sub t0, t1, reg, flags=(OF, SF, ZF, AF, PF, CF)
+};
+
+def macroop CMP_R_R
+{
+    sub t0, reg, regm, flags=(OF, SF, ZF, AF, PF, CF)
+};
+
+def macroop CMP_R_I
+{
+    limm t1, imm
+    sub t0, reg, t1, flags=(OF, SF, ZF, AF, PF, CF)
+};
+'''