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Diffstat (limited to 'src/arch/x86/isa/insts/data_transfer/xchg.py')
-rw-r--r--src/arch/x86/isa/insts/data_transfer/xchg.py16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/arch/x86/isa/insts/data_transfer/xchg.py b/src/arch/x86/isa/insts/data_transfer/xchg.py
index 4f401deb7..9478c71fc 100644
--- a/src/arch/x86/isa/insts/data_transfer/xchg.py
+++ b/src/arch/x86/isa/insts/data_transfer/xchg.py
@@ -68,31 +68,31 @@ def macroop XCHG_R_R
def macroop XCHG_R_M
{
- ld t1, ds, [scale, index, base], disp
- st reg, ds, [scale, index, base], disp
+ ld t1, seg, sib, disp
+ st reg, seg, sib, disp
mov reg, reg, t1
};
def macroop XCHG_R_P
{
rdip t7
- ld t1, ds, [0, t0, t7], disp
- st reg, ds, [0, t0, t7], disp
+ ld t1, seg, riprel, disp
+ st reg, seg, riprel, disp
mov reg, reg, t1
};
def macroop XCHG_M_R
{
- ld t1, ds, [scale, index, base], disp
- st reg, ds, [scale, index, base], disp
+ ld t1, seg, sib, disp
+ st reg, seg, sib, disp
mov reg, reg, t1
};
def macroop XCHG_P_R
{
rdip t7
- ld t1, ds, [0, t0, t7], disp
- st reg, ds, [0, t0, t7], disp
+ ld t1, seg, riprel, disp
+ st reg, seg, riprel, disp
mov reg, reg, t1
};
'''