summaryrefslogtreecommitdiff
path: root/src/arch/x86/isa/insts/general_purpose/arithmetic/add_and_subtract.py
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/x86/isa/insts/general_purpose/arithmetic/add_and_subtract.py')
-rw-r--r--src/arch/x86/isa/insts/general_purpose/arithmetic/add_and_subtract.py36
1 files changed, 36 insertions, 0 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/arithmetic/add_and_subtract.py b/src/arch/x86/isa/insts/general_purpose/arithmetic/add_and_subtract.py
index 9fc3e9035..68031c76c 100644
--- a/src/arch/x86/isa/insts/general_purpose/arithmetic/add_and_subtract.py
+++ b/src/arch/x86/isa/insts/general_purpose/arithmetic/add_and_subtract.py
@@ -67,18 +67,22 @@ def macroop ADD_P_I
def macroop ADD_LOCKED_M_I
{
limm t2, imm
+ mfence
ldstl t1, seg, sib, disp
add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, sib, disp
+ mfence
};
def macroop ADD_LOCKED_P_I
{
rdip t7
limm t2, imm
+ mfence
ldstl t1, seg, riprel, disp
add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, riprel, disp
+ mfence
};
def macroop ADD_M_R
@@ -98,17 +102,21 @@ def macroop ADD_P_R
def macroop ADD_LOCKED_M_R
{
+ mfence
ldstl t1, seg, sib, disp
add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, sib, disp
+ mfence
};
def macroop ADD_LOCKED_P_R
{
rdip t7
+ mfence
ldstl t1, seg, riprel, disp
add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, riprel, disp
+ mfence
};
def macroop ADD_R_M
@@ -168,18 +176,22 @@ def macroop SUB_P_I
def macroop SUB_LOCKED_M_I
{
limm t2, imm
+ mfence
ldstl t1, seg, sib, disp
sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, sib, disp
+ mfence
};
def macroop SUB_LOCKED_P_I
{
rdip t7
limm t2, imm
+ mfence
ldstl t1, seg, riprel, disp
sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, riprel, disp
+ mfence
};
def macroop SUB_M_R
@@ -199,17 +211,21 @@ def macroop SUB_P_R
def macroop SUB_LOCKED_M_R
{
+ mfence
ldstl t1, seg, sib, disp
sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, sib, disp
+ mfence
};
def macroop SUB_LOCKED_P_R
{
rdip t7
+ mfence
ldstl t1, seg, riprel, disp
sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, riprel, disp
+ mfence
};
def macroop ADC_R_R
@@ -243,18 +259,22 @@ def macroop ADC_P_I
def macroop ADC_LOCKED_M_I
{
limm t2, imm
+ mfence
ldstl t1, seg, sib, disp
adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, sib, disp
+ mfence
};
def macroop ADC_LOCKED_P_I
{
rdip t7
limm t2, imm
+ mfence
ldstl t1, seg, riprel, disp
adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, riprel, disp
+ mfence
};
def macroop ADC_M_R
@@ -274,17 +294,21 @@ def macroop ADC_P_R
def macroop ADC_LOCKED_M_R
{
+ mfence
ldstl t1, seg, sib, disp
adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, sib, disp
+ mfence
};
def macroop ADC_LOCKED_P_R
{
rdip t7
+ mfence
ldstl t1, seg, riprel, disp
adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, riprel, disp
+ mfence
};
def macroop ADC_R_M
@@ -344,18 +368,22 @@ def macroop SBB_P_I
def macroop SBB_LOCKED_M_I
{
limm t2, imm
+ mfence
ldstl t1, seg, sib, disp
sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, sib, disp
+ mfence
};
def macroop SBB_LOCKED_P_I
{
rdip t7
limm t2, imm
+ mfence
ldstl t1, seg, riprel, disp
sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, riprel, disp
+ mfence
};
def macroop SBB_M_R
@@ -375,17 +403,21 @@ def macroop SBB_P_R
def macroop SBB_LOCKED_M_R
{
+ mfence
ldstl t1, seg, sib, disp
sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, sib, disp
+ mfence
};
def macroop SBB_LOCKED_P_R
{
rdip t7
+ mfence
ldstl t1, seg, riprel, disp
sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
stul t1, seg, riprel, disp
+ mfence
};
def macroop NEG_R
@@ -410,16 +442,20 @@ def macroop NEG_P
def macroop NEG_LOCKED_M
{
+ mfence
ldstl t1, seg, sib, disp
sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF)
stul t1, seg, sib, disp
+ mfence
};
def macroop NEG_LOCKED_P
{
rdip t7
+ mfence
ldstl t1, seg, riprel, disp
sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF)
stul t1, seg, riprel, disp
+ mfence
};
'''