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Diffstat (limited to 'src/arch/x86/isa/insts/general_purpose/flags/load_and_store.py')
-rw-r--r--src/arch/x86/isa/insts/general_purpose/flags/load_and_store.py32
1 files changed, 25 insertions, 7 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/flags/load_and_store.py b/src/arch/x86/isa/insts/general_purpose/flags/load_and_store.py
index c6f279a25..0915bf819 100644
--- a/src/arch/x86/isa/insts/general_purpose/flags/load_and_store.py
+++ b/src/arch/x86/isa/insts/general_purpose/flags/load_and_store.py
@@ -53,10 +53,28 @@
#
# Authors: Gabe Black
-microcode = ""
-#let {{
-# class LAHF(Inst):
-# "GenFault ${new UnimpInstFault}"
-# class SAHF(Inst):
-# "GenFault ${new UnimpInstFault}"
-#}};
+microcode = '''
+def macroop SAHF {
+ # This will fold to ah since this never executes in 64 bit mode.
+ ruflags rsp, dataSize=1
+};
+
+# This is allows the instruction to write to ah in 64 bit mode.
+def macroop SAHF_64 {
+ ruflags t1
+ slli t1, t1, 8
+ mov t1, t1, rax, dataSize=1
+ mov rax, rax, t1, dataSize=2
+};
+
+def macroop LAHF {
+ # This will fold to ah since this never executes in 64 bit mode.
+ wruflags rsp, t0, dataSize=1
+};
+
+# This is allows the instruction to read from ah in 64 bit mode.
+def macroop LAHF_64 {
+ srli t1, rax, 8, dataSize=2
+ wruflags t1, t0, dataSize=1
+};
+'''