diff options
Diffstat (limited to 'src/arch/x86/isa/insts/general_purpose')
-rw-r--r-- | src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py | 37 |
1 files changed, 35 insertions, 2 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py b/src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py index d42c68795..4dc0b308e 100644 --- a/src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py +++ b/src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py @@ -58,6 +58,41 @@ def macroop PREFETCH_T0_P ld t0, seg, riprel, disp, dataSize=1, prefetch=True }; +def macroop CLFLUSH_M +{ + clflushopt t0, seg, sib, disp, dataSize=1 + mfence +}; + +def macroop CLFLUSH_P +{ + rdip t7 + clflushopt t0, seg, riprel, disp, dataSize=1 + mfence +}; + +def macroop CLFLUSHOPT_M +{ + clflushopt t0, seg, sib, disp, dataSize=1 +}; + +def macroop CLFLUSHOPT_P +{ + rdip t7 + clflushopt t0, seg, riprel, disp, dataSize=1 +}; + +def macroop CLWB_M +{ + clwb t1, seg, sib, disp, dataSize=1 +}; + +def macroop CLWB_P +{ + rdip t7 + clwb t1, seg, riprel, disp, dataSize=1 +}; + ''' #let {{ @@ -71,6 +106,4 @@ def macroop PREFETCH_T0_P # "GenFault ${new UnimpInstFault}" # class PREFETCHW(Inst): # "GenFault ${new UnimpInstFault}" -# class CLFLUSH(Inst): -# "GenFault ${new UnimpInstFault}" #}}; |