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-rw-r--r--src/arch/x86/isa/insts/simd64/integer/data_reordering/extract_and_insert.py20
1 files changed, 18 insertions, 2 deletions
diff --git a/src/arch/x86/isa/insts/simd64/integer/data_reordering/extract_and_insert.py b/src/arch/x86/isa/insts/simd64/integer/data_reordering/extract_and_insert.py
index 80f7a3e71..c9ebbcf14 100644
--- a/src/arch/x86/isa/insts/simd64/integer/data_reordering/extract_and_insert.py
+++ b/src/arch/x86/isa/insts/simd64/integer/data_reordering/extract_and_insert.py
@@ -54,6 +54,22 @@
# Authors: Gabe Black
microcode = '''
-# PEXTRW
-# PINSRW
+def macroop PEXTRW_R_MMX_I {
+ mov2int reg, mmxm, "IMMEDIATE & mask(2)", size=2, ext=0
+};
+
+def macroop PINSRW_MMX_R_I {
+ mov2fp mmx, regm, "IMMEDIATE & mask(2)", size=2, ext=0
+};
+
+def macroop PINSRW_MMX_M_I {
+ ld t1, seg, sib, disp, dataSize=2
+ mov2fp mmx, t1, "IMMEDIATE & mask(2)", size=2, ext=0
+};
+
+def macroop PINSRW_MMX_P_I {
+ rdip t7
+ ld t1, seg, riprel, disp, dataSize=2
+ mov2fp mmx, t1, "IMMEDIATE & mask(2)", size=2, ext=0
+};
'''