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-rw-r--r--src/arch/x86/isa/insts/system/msrs.py8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/arch/x86/isa/insts/system/msrs.py b/src/arch/x86/isa/insts/system/msrs.py
index 1acb4c792..461ed1054 100644
--- a/src/arch/x86/isa/insts/system/msrs.py
+++ b/src/arch/x86/isa/insts/system/msrs.py
@@ -99,4 +99,12 @@ def macroop WRMSR
or t2, t2, t3, dataSize=8
st t2, intseg, [8, t1, rcx], dataSize=8, addressSize=4
};
+
+def macroop RDTSC
+{
+ rdtsc t1
+ mov rax, rax, t1, dataSize=4
+ srli t1, t1, 32, dataSize=8
+ mov rdx, rdx, t1, dataSize=4
+};
'''