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-rw-r--r--src/arch/x86/isa/insts/x87/compare_and_test/floating_point_unordered_compare.py16
-rw-r--r--src/arch/x86/isa/insts/x87/data_transfer_and_conversion/convert_and_load_or_store_integer.py17
2 files changed, 30 insertions, 3 deletions
diff --git a/src/arch/x86/isa/insts/x87/compare_and_test/floating_point_unordered_compare.py b/src/arch/x86/isa/insts/x87/compare_and_test/floating_point_unordered_compare.py
index 8cca0582b..7007c2d74 100644
--- a/src/arch/x86/isa/insts/x87/compare_and_test/floating_point_unordered_compare.py
+++ b/src/arch/x86/isa/insts/x87/compare_and_test/floating_point_unordered_compare.py
@@ -1,4 +1,6 @@
# Copyright (c) 2007 The Hewlett-Packard Development Company
+# Copyright (c) 2015 Advanced Micro Devices, Inc.
+#
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -34,11 +36,21 @@
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Gabe Black
+# Steve Reinhardt
microcode = '''
# FUCOM
# FUCOMP
# FUCOMPP
-# FUCOMI
-# FUCOMIP
+
+# fucomi
+def macroop FUCOMI_R {
+ compfp st(0), sti
+};
+
+# fucomi with stack pop (caused by spm=1)
+def macroop FUCOMIP_R {
+ compfp st(0), sti, spm=1
+};
+
'''
diff --git a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/convert_and_load_or_store_integer.py b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/convert_and_load_or_store_integer.py
index 38f179d74..9bf4ec614 100644
--- a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/convert_and_load_or_store_integer.py
+++ b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/convert_and_load_or_store_integer.py
@@ -1,4 +1,6 @@
# Copyright (c) 2007 The Hewlett-Packard Development Company
+# Copyright (c) 2015 Advanced Micro Devices, Inc.
+#
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -34,9 +36,22 @@
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Gabe Black
+# Steve Reinhardt
microcode = '''
-# FILD
+# fild common case
+def macroop FILD_M {
+ ldifp87 ufp1, seg, sib, disp
+ movfp st(-1), ufp1, spm=-1
+};
+
+# fild with RIP-relative addressing
+def macroop FILD_P {
+ rdip t7
+ ldifp87 ufp1, seg, riprel, disp
+ movfp st(-1), ufp1, spm=-1
+};
+
# FIST
# FISTP
# FISTTP