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Diffstat (limited to 'src/arch/x86/isa/microops/base.isa')
| -rw-r--r-- | src/arch/x86/isa/microops/base.isa | 172 |
1 files changed, 172 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microops/base.isa b/src/arch/x86/isa/microops/base.isa new file mode 100644 index 000000000..b1351d999 --- /dev/null +++ b/src/arch/x86/isa/microops/base.isa @@ -0,0 +1,172 @@ +// -*- mode:c++ -*- + +// Copyright (c) 2007 The Hewlett-Packard Development Company +// All rights reserved. +// +// Redistribution and use of this software in source and binary forms, +// with or without modification, are permitted provided that the +// following conditions are met: +// +// The software must be used only for Non-Commercial Use which means any +// use which is NOT directed to receiving any direct monetary +// compensation for, or commercial advantage from such use. Illustrative +// examples of non-commercial use are academic research, personal study, +// teaching, education and corporate research & development. +// Illustrative examples of commercial use are distributing products for +// commercial advantage and providing services using the software for +// commercial advantage. +// +// If you wish to use this software or functionality therein that may be +// covered by patents for commercial use, please contact: +// Director of Intellectual Property Licensing +// Office of Strategy and Technology +// Hewlett-Packard Company +// 1501 Page Mill Road +// Palo Alto, California 94304 +// +// Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. Redistributions +// in binary form must reproduce the above copyright notice, this list of +// conditions and the following disclaimer in the documentation and/or +// other materials provided with the distribution. Neither the name of +// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. No right of +// sublicense is granted herewith. Derivatives of the software and +// output created using the software may be prepared, but only for +// Non-Commercial Uses. Derivatives of the software may be shared with +// others provided: (i) the others agree to abide by the list of +// conditions herein which includes the Non-Commercial Use restrictions; +// and (ii) such Derivatives of the software include the above copyright +// notice to acknowledge the contribution from this software where +// applicable, this list of conditions and the disclaimer below. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +// Authors: Gabe Black + +//The operand types a microop template can be specialized with +output header {{ + enum OperandType { + RegisterOperand, + ImmediateOperand + }; +}}; + +//A class which is the base of all x86 micro ops it provides a function to +//set necessary flags appropriately. +output header {{ + class X86MicroOpBase : public X86StaticInst + { + protected: + X86MicroOpBase(bool isMicro, bool isDelayed, + bool isFirst, bool isLast, + const char *mnem, ExtMachInst _machInst, + OpClass __opClass) : + X86StaticInst(mnem, _machInst, __opClass) + { + flags[IsMicroOp] = isMicro; + flags[IsDelayedCommit] = isDelayed; + flags[IsFirstMicroOp] = isFirst; + flags[IsLastMicroOp] = isLast; + } + }; +}}; + +// This sets up a class which is templated on the type of +// arguments a particular flavor of a microcode instruction +// can accept. It's parameters are specialized to create polymorphic +// behavior in microops. +def template BaseMicroOpTemplateDeclare {{ + template%(signature)s + class %(class_name)s; +}}; + +let {{ + def buildBaseMicroOpTemplate(Name, numParams): + signature = "<" + signature += "int SignatureOperandTypeSpecifier0" + for count in xrange(1,numParams): + signature += \ + ", int SingatureOperandTypeSpecifier%d" % count + signature += ">" + subs = {"signature" : signature, "class_name" : Name} + return BaseMicroOpTemplateDeclare.subst(subs) + + RegOpType = "RegisterOperand" + ImmOpType = "ImmediateOperand" + + def buildMicroOpTemplateDict(*params): + signature = "<" + if len(params): + signature += params[0] + if len(params) > 1: + for param in params[1:]: + signature += ", %s" % param + signature += ">" + subs = {"param_dec" : "", "param_arg_dec" : "", + "param_init" : "", "signature" : signature} + for count in xrange(len(params)): + subs["param_dec"] += "uint64_t param%d;\n" % count + subs["param_arg_dec"] += ", uint64_t _param%d" % count + subs["param_init"] += ", param%d(_param%d)" % (count, count) + return subs +}}; + +// A tmeplate for building a specialized version of the microcode +// instruction which knows specifies which arguments it wants +def template MicroOpDeclare {{ + template<> + class %(class_name)s%(signature)s : public X86MicroOpBase + { + protected: + %(param_dec)s + void buildMe(); + + public: + %(class_name)s(bool isMicro, bool isDelayed, + bool isFirst, bool isLast, + ExtMachInst _machInst %(param_arg_dec)s); + + %(class_name)s(ExtMachInst _machInst %(param_arg_dec)s); + + %(BasicExecDeclare)s + }; +}}; + +def template MicroOpConstructor {{ + + inline void %(class_name)s%(signature)s::buildMe() + { + %(constructor)s; + } + + inline %(class_name)s%(signature)s::%(class_name)s( + ExtMachInst machInst %(param_arg_dec)s) : + %(base_class)s(false, false, false, false, + "%(mnemonic)s", machInst, %(op_class)s) + %(param_init)s + { + buildMe(); + } + + inline %(class_name)s%(signature)s::%(class_name)s( + bool isMicro, bool isDelayed, bool isFirst, bool isLast, + ExtMachInst machInst %(param_arg_dec)s) + : %(base_class)s(isMicro, isDelayed, isFirst, isLast, + "%(mnemonic)s", machInst, %(op_class)s) + %(param_init)s + { + buildMe(); + } +}}; |