diff options
Diffstat (limited to 'src/arch/x86/isa/microops/fpop.isa')
| -rw-r--r-- | src/arch/x86/isa/microops/fpop.isa | 25 |
1 files changed, 20 insertions, 5 deletions
diff --git a/src/arch/x86/isa/microops/fpop.isa b/src/arch/x86/isa/microops/fpop.isa index d5a39817a..abb6abb72 100644 --- a/src/arch/x86/isa/microops/fpop.isa +++ b/src/arch/x86/isa/microops/fpop.isa @@ -108,7 +108,7 @@ let {{ class FpOpMeta(type): def buildCppClasses(self, name, Name, suffix, \ - code, flag_code, cond_check, else_code): + code, flag_code, cond_check, else_code, op_class): # Globals to stick the output in global header_output @@ -122,7 +122,7 @@ let {{ # a version without it and fix up this version to use it. if flag_code is not "" or cond_check is not "true": self.buildCppClasses(name, Name, suffix, - code, "", "true", else_code) + code, "", "true", else_code, op_class) suffix = "Flags" + suffix base = "X86ISA::FpOp" @@ -133,13 +133,15 @@ let {{ "flag_code" : flag_code, "cond_check" : cond_check, "else_code" : else_code, - "top_code" : "TOP = (TOP + spm + 8) % 8;"}) + "top_code" : "TOP = (TOP + spm + 8) % 8;", + "op_class" : op_class}) iop = InstObjParams(name, Name + suffix, base, {"code" : code, "flag_code" : flag_code, "cond_check" : cond_check, "else_code" : else_code, - "top_code" : ";"}) + "top_code" : ";", + "op_class" : op_class}) # Generate the actual code (finally!) header_output += MicroFpOpDeclare.subst(iop_top) @@ -165,10 +167,11 @@ let {{ flag_code = cls.flag_code cond_check = cls.cond_check else_code = cls.else_code + op_class = cls.op_class # Set up the C++ classes mcls.buildCppClasses(cls, name, Name, "", - code, flag_code, cond_check, else_code) + code, flag_code, cond_check, else_code, op_class) # Hook into the microassembler dict global microopClasses @@ -185,6 +188,7 @@ let {{ flag_code = "" cond_check = "true" else_code = ";" + op_class = "FloatAddOp" def __init__(self, dest, src1, spm=0, \ SetStatus=False, dataSize="env.dataSize"): @@ -218,6 +222,7 @@ let {{ flag_code = "" cond_check = "true" else_code = ";" + op_class = "FloatAddOp" def __init__(self, dest, src1, src2, spm=0, \ SetStatus=False, dataSize="env.dataSize"): @@ -253,20 +258,25 @@ let {{ class Sqrtfp(FpBinaryOp): code = 'FpDestReg = sqrt(FpSrcReg2);' + op_class = 'FloatSqrtOp' class Cosfp(FpUnaryOp): code = 'FpDestReg = cos(FpSrcReg1);' + op_class = 'FloatSqrtOp' class Sinfp(FpUnaryOp): code = 'FpDestReg = sin(FpSrcReg1);' + op_class = 'FloatSqrtOp' class Tanfp(FpUnaryOp): code = 'FpDestReg = tan(FpSrcReg1);' + op_class = 'FloatSqrtOp' # Conversion microops class ConvOp(FpBinaryOp): abstract = True + op_class = 'FloatCvtOp' def __init__(self, dest, src1): super(ConvOp, self).__init__(dest, src1, \ "InstRegIndex(FLOATREG_MICROFP0)") @@ -303,9 +313,11 @@ let {{ class mulfp(FpBinaryOp): code = 'FpDestReg = FpSrcReg1 * FpSrcReg2;' + op_class = 'FloatMultOp' class divfp(FpBinaryOp): code = 'FpDestReg = FpSrcReg1 / FpSrcReg2;' + op_class = 'FloatDivOp' class subfp(FpBinaryOp): code = 'FpDestReg = FpSrcReg1 - FpSrcReg2;' @@ -314,12 +326,14 @@ let {{ code = ''' FpDestReg = FpSrcReg2 * (log(FpSrcReg1) / log(2)); ''' + op_class = 'FloatSqrtOp' class PremFp(FpBinaryOp): code = ''' FpDestReg = fmod(FpSrcReg1, FpSrcReg2); DPRINTF(X86, "src1: %lf, src2: %lf, dest: %lf\\n", FpSrcReg1, FpSrcReg2, FpDestReg); ''' + op_class = 'FloatDivOp' class Compfp(FpBinaryOp): def __init__(self, src1, src2, spm=0, setStatus=False, \ @@ -347,6 +361,7 @@ let {{ else if(FpSrcReg1 == FpSrcReg2) ccFlagBits = ccFlagBits | ZFBit; ''' + op_class = 'FloatCmpOp' class absfp(FpUnaryOp): code = 'FpDestReg = fabs(FpSrcReg1);' |