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-rw-r--r--src/arch/x86/isa/microops/regop.isa5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index 6bd26608e..35f319528 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -1100,6 +1100,11 @@ let {{
DestReg = TscOp;
'''
+ class Rdm5reg(RdRegOp):
+ code = '''
+ DestReg = M5Reg;
+ '''
+
class Wrdl(RegOp):
code = '''
SegDescriptor desc = SrcReg1;