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Diffstat (limited to 'src/arch/x86/isa/microops/regop.isa')
-rw-r--r--src/arch/x86/isa/microops/regop.isa5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index 40a441b1e..de2e6692d 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -439,10 +439,11 @@ let {{
abstract = True
flag_code = '''
//Don't have genFlags handle the OF or CF bits
- uint64_t mask = CFBit | OFBit;
+ uint64_t mask = CFBit | ECFBit | OFBit;
ccFlagBits = genFlags(ccFlagBits, ext & ~mask, DestReg, psrc1, op2);
//If a logic microop wants to set these, it wants to set them to 0.
ccFlagBits &= ~(CFBit & ext);
+ ccFlagBits &= ~(ECFBit & ext);
ccFlagBits &= ~(OFBit & ext);
'''
@@ -852,7 +853,7 @@ let {{
class Ruflag(RegOp):
code = '''
- int flag = bits(ccFlagBits, imm8 + 0*psrc1);
+ int flag = bits(ccFlagBits, imm8);
DestReg = merge(DestReg, flag, dataSize);
ccFlagBits = (flag == 0) ? (ccFlagBits | EZFBit) :
(ccFlagBits & ~EZFBit);