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Diffstat (limited to 'src/arch/x86/isa/microops/regop.isa')
-rw-r--r--src/arch/x86/isa/microops/regop.isa25
1 files changed, 11 insertions, 14 deletions
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index 08a4ddd41..6f2901b25 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -51,7 +51,7 @@ def template MicroRegOpExecute {{
%(op_decl)s;
%(op_rd)s;
- IntReg result M5_VAR_USED;
+ RegVal result M5_VAR_USED;
if(%(cond_check)s)
{
@@ -81,7 +81,7 @@ def template MicroRegOpImmExecute {{
%(op_decl)s;
%(op_rd)s;
- IntReg result M5_VAR_USED;
+ RegVal result M5_VAR_USED;
if(%(cond_check)s)
{
@@ -1220,8 +1220,8 @@ let {{
class Wrflags(WrRegOp):
code = '''
- MiscReg newFlags = psrc1 ^ op2;
- MiscReg userFlagMask = 0xDD5;
+ RegVal newFlags = psrc1 ^ op2;
+ RegVal userFlagMask = 0xDD5;
// Get only the user flags
ccFlagBits = newFlags & ccFlagMask;
@@ -1268,8 +1268,8 @@ let {{
class Rflag(RegOp):
code = '''
- MiscReg flagMask = 0x3F7FDD5;
- MiscReg flags = (nccFlagBits | ccFlagBits | cfofBits | dfBit |
+ RegVal flagMask = 0x3F7FDD5;
+ RegVal flags = (nccFlagBits | ccFlagBits | cfofBits | dfBit |
ecfBit | ezfBit) & flagMask;
int flag = bits(flags, imm8);
@@ -1278,8 +1278,8 @@ let {{
'''
big_code = '''
- MiscReg flagMask = 0x3F7FDD5;
- MiscReg flags = (nccFlagBits | ccFlagBits | cfofBits | dfBit |
+ RegVal flagMask = 0x3F7FDD5;
+ RegVal flags = (nccFlagBits | ccFlagBits | cfofBits | dfBit |
ecfBit | ezfBit) & flagMask;
int flag = bits(flags, imm8);
@@ -1294,7 +1294,7 @@ let {{
class Sext(RegOp):
code = '''
- IntReg val = psrc1;
+ RegVal val = psrc1;
// Mask the bit position so that it wraps.
int bitPos = op2 & (dataSize * 8 - 1);
int sign_bit = bits(val, bitPos, bitPos);
@@ -1304,7 +1304,7 @@ let {{
'''
big_code = '''
- IntReg val = psrc1;
+ RegVal val = psrc1;
// Mask the bit position so that it wraps.
int bitPos = op2 & (dataSize * 8 - 1);
int sign_bit = bits(val, bitPos, bitPos);
@@ -1390,10 +1390,7 @@ let {{
if (dest == 1 || (dest > 4 && dest < 8) || (dest > 8)) {
fault = std::make_shared<InvalidOpcode>();
} else {
- // There are *s in the line below so it doesn't confuse the
- // parser. They may be unnecessary.
- //Mis*cReg old*Val = pick(Cont*rolDest, 0, dat*aSize);
- MiscReg newVal = psrc1;
+ RegVal newVal = psrc1;
// Check for any modifications that would cause a fault.
switch(dest) {